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The History Of Pentium
yootje writes "ArsTechnica is running a story about the history of the Pentium processor. It starts with the original Pentium back in 1993, but it also handles the Pentium II and III. The article goes deep about how the processors are designed and work."
You lucky BASTARD, all we had was a 486SX-33.
Anyone else but me feel old when they read a comment like this? To me 33Mhz still feels like yesterday, not like some ancient processor speed.
I guess I'm the one getting ancient here.
Is there any way of "easily" understanding how a chip handles out of order dependcies? I've done some 6502 programming (Atari 2600) but the idea seems pretty amazing to me...I guess each instruction can only affect a certain # of registers and memory locations, and if another instruction doesn't rely on those, it's ok to run it prematurely, before the the first instruction...
Well, maybe I've answered my own question, but it seems pretty amazing that you can get improved performance with that, and not having to rollback all the time.
SO YOU'RE GOING TO DIE: The Comic for Dealing with Death
Rich.
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My firewall/nat/webserver/voice chat server is comprised of an AMD K6 166 running SuSE 7.2, and has been merrily running disklessly since it was installed more than a year ago.
"The dew has clearly fallen with a particularly sickening thud this morning"
I can think about a few reasons
... but this is what I know from reading various sources
- Expensive
- Intergrated Cache = Expensive Updating
- Too Fucking Hot (I run a Dual PPro and I can't keep this fucker cool even with 5 80mm Case Fans)
Although it did have some good things
- Intergrated Cache = Speedy
- 60 - 66MHz Bus
- Full Speed Bus (unlike the PII)
- Able to run the PII Overdrive and 533MHz Celery's if you got the kit
- Able to run Dual CPU and Quad CPU easy
There is prolly more reasons
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God, yes. I always wonder what would have happened if IBM went with their original idea to go with a Motorola 68000, a true 32-bit CPU with actual registers, as opposed to "Moe, Larry and Curly" (ax, bx, dx) that x86 coders have had to deal with for far too long.
The article lacks a lot of detail, especially about the Pentium I. It makes it look like the "addition of MMX" was to only enhancement of the Pentium I. Instead it went through at least two redesigns and shrinks. First from a BiCMOS based P60 and P66 to the later P75-P200 design. The "addition" of MMX brought many additional tweaks as a far improved branch prediction.
The article does also claim that the Pentium I FPU was sub par. This is not true, in fact the design gets the most out of a stack-based FPU without resorting to out-of-order exucution. The FPU of the much praised contender at that time, the 68060 was as much as three times slower due to lack of pipelining.
Some flaws in the Pentium I designs: Waste of resources for a dual read data cache, which is rarely utilized. Dog slow shift and integer multiplication as compared to motorolas offerings, but intel kept the strategy also in later CPUs.
Replace "copyright" with "trademark" and you have the right idea.