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Sun Working to Eliminate Circuit Boards
lokedhs writes "Sun Microsystems is coming out with new chips without connectors. According to the article, this will have a lot of advantages: 'Performance, for instance, could greatly escalate because the speed of transferring data among chips and the number of channels for the transfers would increase. Energy consumption could also decline. Just as important, overall costs could fall, because defective chips could be removed like Scrabble tiles.' This technology will also lead to new CPU's without cache: 'The technique could also allow designers to remove the cache--the large pool of memory currently found on the processor--and put it on a separate chip. Caches were integrated onto processors to amplify bandwidth. Adding cache, however, bumps up manufacturing costs, as it greatly increases the number of transistors. With the bandwidth constraint gone, caches could once again be made independent without it having an impact on performance.'"
With so many chips so close together, they are certainly going to have heat problems.
Interesting technology, thought.
Did you even read the article before posting it here. The article talked about eliminating the pin that is used to house the chip. Due to the size of the pins, it limits the number of I/O paths a chip can expose to the motherboard. Instead they can implement transmitter/receivers using capacitive inductence to increase the I/O paths a chip can expose. Thereby increasing the bandwith a chip can utilize.
Think of it as lots of itty bitty low power radio transmitters and receivers.
Sounds clever to me. Electrical engineers have been constantly fighting unwanted interference in their circuits. Now they will be listening for it.
It appears some people have managed to implement chip stacking for faster RAM among other things (check out the prototype pix).
--- You shall know the truth, and the truth shall make you mad- Neal (not Cowboy) Boortz
This was posted back in September of last year :
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http://slashdot.org/articles/03/09/22/1055244.sht
jdb2
It uses capacitance links to communicate instead of a direct wire. "Radio waves" aren't used. Two wires near (depends on currents, frequencies, etc. and in this case we're talking about microns) each other can have effects on each other as if they were linked when operating at high frequencies. Remember that a capacitor looks like a wire at high frequencies and essentially two wires next to each other are connected by a capacitor.
The article mentions "capacitive coupling". Here is the relevant WikiPedia entry, and here's a paper on the specifics at Sun.
This side up.
Multiple communications channels between chips can be used. Each channel uses an individual pad slightly embedded in each chip, and the pads in each chip have to be physically aligned to some extent. This has two advantages... because the pads are done on-die and not outside the chip, the pads can be two orders of magnitude smaller than external pins. Also, the pins are protected from electrostatic discharge. The summary at the end of the article says:
- Our 350nm CMOS test chip demonstrates 16 channels operating simultaneously, each communicating pseudo random patterns at a rate of 1.35 Gbps, for an aggregate bandwidth of 21.6 Gbps.
In other words, it looks pretty viable...As for the technique of capacitive coupling, that is how signals used to pass through low voltage amps virtually since the triode tube. The technique has been used for isolation amplifiers for many years. The signal on one side of the voltage barrier is digitised in some way (perhaps just PCM) and transmitted across a voltage barrier using very small capacitors, to where it is decoded. In some cases, power for the input side is also transmitted by capacitive coupling across the barrier.
Because the transmitting and receiving side of the capacitors is so tiny and the electric field therefore so constrained, it is not going to be possible to read the signals with an external aerial.
I believe Philips, among others, earlier suggested using LEDs and photodiodes along the edges of packages, but appart from requiring power they could only be unidirectional. Capacitive coupling itself absorbs begligible power and can be fully bidirectional.
Panurge has posted for the last time. Thanks for the positive moderations.
The problem with capacitive connections is that you are, for all intents and purposes, using small radio links. This causes several issues to come to the fore:
- Your immunity to cross-talk goes down. Misalignment will exacerbate these problems.
- Capacitive receivers will also be able to pick up local RF fields. The computer will be much more vulnerable to external interference than it was before.
- The computer will also radiate much more than it did before, creating more RFI and leaking information that might be crucial (like crypto keys).
Making the chips the meat in a sandwich with metal sheets for the bread would help this a lot, because tightly coupled ground planes attenuate both radiation and reception. As long as you're putting a ground plane on top of the assembly it might as well do double duty as a cooling device, though I wonder what effect the heat-transfer compounds would have on transmission and crosstalk.Sustainability and energy independence essay
so basically they want to stack the chips? umm, heat?
Re-read article. It's not a stack. They make reference to scrabble tiles as a comparison.
Even if it were a stack liquid cooling built directly into the stack, ala the internal combustion engine, could handle the heat effectively. Probably more effectively then our current heat sink technology.
TW
http://research.sun.com/async/Publications/KPDisc
jdb2
You misspelled "misspelled".
<jedi> There is something funny here. You laugh. </jedi>
The solution to these problems are simple: you make the transmitters low enough power that they dont interfere with each other. From the Sun document I believe that the total power of each individual transmitter was on the order of 1-10 picojoules. That is precisely the reason alignment is such a prime concern - if the chips shift you have the wrong transmitters talking to the wrong receiver.
--Kevin
However, it's probably not a place to discuss it unless you have something to contribute to resolving it.
There is a research paper here that gives a lot more information than the article linked (ironically enough, I happened to be reading it yesterday). They address many of the issues people have brought up (alignment, dust, etc.), and the paper really isn't a hard read.
They actually have a bunch of interesting papers in the parent directory here, mostly covering stuff about asynchronous/clockless computing.
My server
This technology pertains more to chip manufacture than motherboard manufacture. The alignment difficulties alone will prevent this from being seen in the field. According to the research paper, the scientists first aligned the chips using a 10x stereo microscope, then used a Vernier measurement system to align them to within a few microns. There's no way that process will be seen outside of a lab or manufacturing plant.
What this will let chip makers do is to manufacture the cpu and cache on separate silicon wafers, then stack them together and package them as a unit. The researchers claim a speed of 21.6 Gigabits/second using a 4x4 matrix of transmitters. Perhaps we'll see processors being sold with X Gig of memory on-board, with X being the amount of memory that can be manufactured in the same space as the CPU. Perhaps additional processors could be stacked together as well. Imagine putting 4 CPU's and 4 Gig of memory into a spot on a motherboard that takes 1 CPU today. You will still need a printed circuit board to connect to the circuitry that handles the external devices, ports, slots, etc.
Nerve cells already work this way. There is no physical contact between the axons and dendrites. They come very, very close to each other. A potential wave (electric pulse) travels from the nerve soma down the axon, where it causes a huge number of neurotransmitter-filled vacuoles to migrate to the cell membrane. These vacuoles open and release the neurotransmitters into the synaptic gap, where they are carried, purely by diffusion, to the receptor of the adjacent dendrite. There they bind to the dendrite surface and initiate a new, distinct electric pulse in the receiving cell.
In other words, nerve cells work quite a bit like this "capacitive coupling" technology, except instead of using electric fields they use chemical agents to transmit signals.
Your nervous system is partially electrical in nature, but signals are propogated between cells by chemicals, not electric pulses!