Itanium Retreats To Multis, Opteron Presses Attack

vincecate writes " Back in 1997 Itanium was presented as a compatible extension of x86, and Intel had dreams of replacing high end x86 by 1999 (about min 16 in link). However, the original 2001 Itanium had the 32-bit performance of a much older Pentium so Itanium is viewed as non-compatible. Now with the rise of what Microsoft is calling the "x64" architecture (AMD64 and EM64T), Itanium has been repositioned to the multiprocessor server market."

However, Opterons are designed for multiprocessing. Each has its own memory and built in hypertransport links to make NUMA multiprocessors. So existing Opterons don't need large expensive caches like Xeon MP, nor any glue chips for up to 8-way multiprocessors. This has started the commoditization of multiprocessors. You can now buy a 4-way Opteron for $6000 or an 8-way for $10,000.

There is an interesting interview with Tyan CEO and his assistant that give some info about future Opteron plans. People are working on 8-way motherboards that will become 16-way when duel-core Opterons come out. They also say that the next Opteron core, the K9, will be able to 'go over 60 processors without adding any external crossbar chips.' Another fun plan mentioned is connecting the hypertransport links using fibers for really large systems."

Comments

x86 code size advantage over Itanium

[vincecate]

It is reported that IPF executable images are typically three times the size of equivalent Alpha executables. I used crosstool to make a gcc cross compiler, and found Itanic (IPF) code to be twice the size of AMD64 code. This is a significant architectural price/performance difference when it comes to either cache size or memory bandwidth, and no doubt part of why Itanics are so expensive.