Slashdot Mirror
Nanotechnology To Replace Conventional CMOS
neutron_p writes "There is a lot of hype around nanotechnology these days, but some things are going to work in a near future anyway. IMEC announced a program aimed at seeking alternatives to the current CMOS manufacturing technologies using nanotechnologies. IMEC will investigate the use of semiconducting wires, carbon nanotubes and spintronics or electron spin." (IMEC describes itself as "Europe's leading independent research center" in the fields of microelectronics and nanotechnology.)
We've heard this all before ... in hard drives! Back in 1999, manufacturers started using electron spin rather than magnetic charge to store data. From the article ... "Magnetoelectronics manipulates electrons in semiconductors via electron spin, rather than charge." Most hard drives today are GMR (giant magnetoresistance), or technology derived from GMR.
So it's not too wild to think that they'll be able to do it in RAM and such as well.
Purdue University is making a huge effort to be one of the leading Nanotechnology schools: http://discoverypark.e-enterprise.purdue.edu/wps/p ortal
Whoever dies with the most toys wins.
Excelent, now could you please translate all those acronyms into more plain English just so electronics illiterates such as me could actually read your comment?
From AcronymFinder:
IC = Integrated Circuit
CMOS = Complementary Metal Oxide Semiconductor
PMOS = Positive-Channel Metal Oxide Semiconductor
NMOS = Negative-Channel Metal Oxide Semiconductor
MOSFET= Metal-Oxide Semiconductor Field-Effect Transistor
Am I getting it all right?
Thanks in advance!
GMR discs still store the data magnetically.
The MR and GMR effect only replaces the normal inductance coils in the read-head. While older heads registred a voltage spike because of the magnetic flux change in the coil while the data-layer moved below the head, the new heads have a multilayer material that has a spin-sensitive resistance, so the local magnetic field created by the data on the disc spin-polarizes the electrons IN THE HEAD (nothing on the disc) and thus created a vast difference in head resistance depending on the magnetic field.
So the only difference is in how to get the MAGNETICALLY stored data back... Nothing changed in the storage per se.
HI O WISE PRINCE. WHT TOOK U SO DAM LONG?
Sorry, CMOS is the logic technology that is used to build most modern ICs (small device containing many many semiconductors). CMOS is built out of MOSFETs (when someone says 'there are X million transistors on this microprocessor' they are talking about the MOSFET count). The primary feature of CMOS is that it sports two complimentary networks of transistors that only connects VDD or ground at any given time. This means that, ideally, when no data is being switched through the circuit there is zero power dissipation. Of course physics and common sense should tell you that things are never ideal and the smaller MOSFETs get the more power they tend to leak, but CMOS is certainly superior to NMOS (which consists of a ground network and a resistor, so it is constantly leaking power) in the power dissipation department.
IC companies have embraced spintronics, your hard-disk read heads now employ GMR, for instance. IBM and other research labs are spending big $$$ to figure out how to make this technology easily fabricateable. This is NOT traditional CMOS, you can only shrink CMOS down so far, this is for moving beyond.
make world, not war
For those of us who haven't had their 3rd cup of cofee yet, that would be "complementary metal oxide semiconductor".
You can't take the sky from me...
I wouldn't call NMOS/PMOS 'crappy' per se, it's just inherently worse on the power dissipation and isn't very useful for high transistor density and very small MOSFETs. NMOS and PMOS both require nearly half the transistors that CMOS does, and NMOS has the distinct advantage of tending to be faster than CMOS.
Wired ran an interesting article about this. Not a huge surprise, but "nano" has replaced "micro" as the tech buzz word du jour. I think players in the industry realize this and the consumer base will come around in due time -- just the way we have come to accept micro-this, i-that and e-everything.
For anyone interested in the political/institutional side of science, the Wired article is a good read:
http://www.wired.com/wired/archive/12.10/drexler .html
It seems you are trying to make a semantical argument about this. So don't just take my word for it, see what the Institute of Physics have to say about it as well.
make world, not war
CMOS "IS" NMOS and PMOS.
CMOS stands for "c"omplementary "m"etal "o"xide "s"emiconductor. What's complementary you ask? Well they use pmos and nmos gates in series between ground and the rails (the voltage/power source) it all the logic stages. The input gates of the nmos and pmos gates are tied together to drive them simulateously. That means that both gates are never totally "active" and power never shoots straight to ground (or through a resistor). Obviouly that saves a ton of power.
Anyhow the point is that it basically didn't take ANY new tech to do cmos - just using pmos and nmos together. That just takes adding some doping stages for n and p type semiconductors in one process.
Nanotech means largely scrapping the old fabs that cost billions each. Not going to happen any time soon.