Philips, ARM Collaborate On Asynchronous CPU
Sean D. Solle continues "Back in the early 1990's there was a lot of excitement (well, Acorn users got excited) about Prof. Steve Furber's asynchronous ARM research project, "Amulet". The idea is to let the CPU's component blocks run at their own rate, synchronising with each other only when needed. Like a normal RISC processor, one instruction typically takes one clock cycle; but in a clockless ARM, a cycle can take less time for different classes of instructions.
For example, a MOV instruction could finish before (and hence consume less power than) an ADD, even though they both execute in a single cycle. As well as energy-efficiency, running at effectively random frequencies reduces a chip's RFI emissions - handy if it's living in a cellphone or other wireless device."
Preemption is a "dirty hack" to achieve nice behaviour in a timely manner.
For embedded systems where interrupt latency is the primary aspect, other approaches have to be found. also, if the CPU checks after every x instructions if there is an interrupt to process, you get a margin of the timely behaviour.
I am no embedded / safety critical developer, but I know that the fastest response times on interrupts and worst-case response times vary greatly depending solely on the (RT)OS used.
Powerful is he who overpowers his temptations.
That's a brit vs. us english difference. The brits think of a collection as a plurality of parts, at least in some contexts as alluded to below, while us english normally treats a collection as a singular entity of its own, regardless of context. Who care... it adds color to the language. :-)
two words: process variation.
ok, one more word - area.
Yet, I would not bet on clockless cores to become the new mainstream, by far not. Clockless cores will most likely be aimed at embedded design appliances, and low- and ultra-low-power applications.
I think that "embedded appliances" are even more "mainstream" than anything else, since there are far more embedded systems around than general-purpose PC workstations, servers, laptops etc altogether.
The biggest problem with asynchronous chips lies in the fact that all the design tools, fabrication facilities, and testing methodologies are geared toward synchronous processors. If Intel or any chip maker were to release an asynchronous processor on a large scale, it would require a MASSIVE overhaul of the industry. It's an investment that requires both time and money on a risky departure from decades of acquired knowledge in designing synchronous chips.