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The Year 2004 in Microprocessors
DeanMan writes "From spintronics to clockless CPUs, 2004 was a year of process and research in the microprocessor industry. As a way to transition into the new year, this article offers a month-by-month look at the highlights of the 2004 microprocessor timeline."
There's an interesting article about it here.
From TFA: http://www.geek.com/news/geeknews/2004Nov/bch20041 104027700.htm
Asynchronous processors are capable of allowing each of their units to run independent of a global synchronizing clock, saving the power consumption--not to mention the design life cycle--of a complicated and usually power-hungry clock route scheme. The clock is increasingly the source of a large amount of power consumption, because of both the increasingly long relative wire length and the buffers (extra gates) required to repeat the signals in high-clock-speed devices. Obviously, the elegance of this low power design comes at a cost, in fact a barrier cost to high volume manufacturers. First of all, there is a great reliability issue for high-speed devices. No clock means potential race conditions and other performance/functional conflicts.
asynchronous CPUs - different parts of the CPU go at their own speed and the results are co-ordinated in other ways (i.e. without lockstep execution across the whole chip).
This is much more complicated to design and to mass produce but the power savings may make it worthwhile.
One should remember that clockless design
poses two huge difficulties:
1) verification (both logical and timing);
2) in-chip noise.
Clocking allows oscillations created
by generating edges to fade out before
the sampling edge.
In clockless designs signals change whenever they
want in a sense, so sampling may occur while
the noise (parasitic oscillations) is still high,
and wrong values will be stored/used.
Intel's plan all along has been to reduce the size of their pipeline stages in order to increase the possible clock rate.
Unless this is a new plan the word reduce should be increase.
The article claims that Sun is outsourcing Niagara, which is a 65Nm process to Fujitsu. This is absolutely false. Niagara is to debut in 2005-2006 according to Sun and on 90Nm technology not 2007.
9 10
http://blogs.sun.com/roller/page/jonathan/20040
Since the chip is already in the Sun labs how can it be 65Nm? No fab, in my knowledge, is ready for 65Nm yet,
http://aceshardware.com/read.jsp?id=65000293
Also sun never claimed to outsource all chip manufacturing to Fujitsu. The article is based on blurbs from unreliable sources, example geek.net.
This is the second IBM article to calim that Sun is outsourcing all chip desgin and manufacturing to fujitsu. Is this some sort of FUD IBM is trying to spread?