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Intel Develops Hardware To Enhance TCP/IP Stacks
RyuuzakiTetsuya writes "The Register is reporting that Intel is developing I/OAT, or I/O Acceleration Technology, which allows the CPU, the mobo chipset and the ethernet controller to help deal with TCP/IP overhead."
Yet another processor that requires liquid nitrogen.
From what I've heard, nVidia's implementation is sucking major ass.
With the ever growing wishes by some to get first posts, I think the little time to write a post may yield that kind of quality.
Beware: In C++, your friends can see your privates!
when I was actively doing programming, I got into the bad habit of doing:
int x = 0;
Non impediti ratione cogitationus.
Wow, that's horrible. It's almost like you're defining it before using it? Crazy, how that works out just like I suggested.
I say the last digit of pi is zero
Do your best, hope for the best, suspect the worst.
So it goes on and on...
x86 has gotten 32bit extensions, protected mode, MMX, 3DNow, MMX2, SSE, SSE2, 64bit extensions (+ some new registers), and now another special-purpose instruction set (?) enhancement.
PPC, on the other hand, has been a 64bit instruction set from the beginning (of the '90s, that is); has had one SIMD instruction set (Altivec) that many claim to be superior to all that SSE stuff; and it has lots of nice registers and cool instructions that are much more fun to use for any compiler than the Intel crap.
Oh, and PPC hasn't changed through all those years, so you don't have to learn new instruction sets all the time (and program that damn chip in assembly, because compilers don't know the extensions, yet!).
Ha! Typical male chauvinistic obsession with faster, faster - when everybody knows that when it comes to sex you actually strive for SLOWNESS and PROLONGING. We don't need no fucking porn accelerator :-)