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AMD's New Venice Core Shows Overclocking Potential
Vigile writes "It looks like the new Venice core processors from AMD are going to offer more than just 90nm technology through the entire line up. According to this article on PC Perspective, it is going to offer a lot of headroom for future processors as the author was able to overclock their 2.0 GHz sample to 2.8 GHz! I think I hear an FX-61 calling my name!"
Multipliers on AMD processors are unlocked in the downward direction.
AMD chips have multipliers unlocked downwards. That means if its got a 10x or 12x multiplier, you can chose 8, 9, 10, up to the default number. It works well, even if you dont want to OC, you can turn down the multiplier and crank up the FSB for better performance.
The Doormat
If you're not outraged, then you're not paying attention.
Parent doesn't really seem to know what he's talking about (perhaps he glanced at an architecture book once). The memory hierarchy of almost all modern processors ensures that only a very tiny portion of instructions generate real disk accesses. Relatively few apps are really effected by storage speed... look at some gaming/application benchmarks for a 10k rpm disk vs. a 7.2k rpm disk with the same buffer size.
The parent is currently moderated "Insightful" -- but it isn't. It's wrong.
P = I^2 R. For a processor, the current applied to each transistor is proportional to the clock frequency and the resistance is constant, so the power consumption per transistor (ceteris paribus) rises as the square of the clock rate. For modern processors, the power consumption of the chip is basically due to the total switching power of the transistors, and thus the power consumption rises roughly as the square of clock speed.
Multipliers on AMD processors are unlocked in the downward direction.
Athlon 64 processors are unlocked in the downward direction. Athlon 64 FX processors are unlocked in both directions.
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- 3ghz Intel Pentium 4
- 512mb RAM
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Total Price: $658, free shipping included. Add in an extra $200 for a PCI-Express video card and, at $858, it's comparatively inexpensive. It's not an excellent machine, I understand that; and, while I'm willing to pay a premium for a better machine, I don't expect the premium to be more than 10-20 percent more.An effective signature identifies a particular user amongst a base of thousands.
something revolutionary and cheap, maybe a new optical memory
Revolutionary and cheap.. You don't ask for much do you? Optical is coming slowly, but I'm not convinced it's ever going to replace electric current/voltage-based computing. At least not for general computing.. The problem is shrinking optical paths; you need a wave-guide for optical paths; for electric current, all you need is a string of closely spaced ionized atoms. Theoretically you could get down to a couple-atoms thick of wire with electric current.
Moreover, photons are only slightly faster than electric-current. Electrons move between 0.6 and 0.9 times the speed of light. What photons are really good at is traveling long distances without dispersing as heat. Electrons move only a couple atoms before bouncing into something. But you can do lots of really useful things with electrons that you can't do with photons... Having photons mimic the functionality of electrons might not be doable on the same scale (meaning by the time you get 30 million photonic transistors on a die, you could probalby get a billion electric transistors).
Quantum computing has the same density dilemma as photonic computing. But at least quantum computing does more than electric or photonic switching, so it doesn't need as many functional units. Don't expect to see an Intel Q4 any time soon.
As for a more practical architecture. If practical and economic are what you want then the Pentium 3's with a flat BUS multi-CPU architecture is where it's at. Lots of cheap cores on as simple an architecture as you can get.
The problem of course is in the mathmatical algorithms that we use to do real work. Most steps of computational algorithms are inherently dependent on the results of previous steps, and are thus not parallelizable. single-threaded CPU's have gotten VERY good at parallelizing individual instructions. The compilers aren't well suited for helping the CPU out, so things like the Itanium were supposed to exploit such parallelism. But the loss of backward compatability (and the Itanium's focus on floating point) spelled the death nell for that architecture.
IBM, Intel, AMD are all pushing multi-threaded execution.. Basically giving up on figuring out how to make a particular algorithm work. They're pretending that a CPU which works well on a high-end server with lots of independent jobs (web pages, database transactions, IO requests, etc) can be sold to a market which is trying to scroll the mouse wheel on an excel spreadsheet with a thousand rows. The spread-sheet navigation is extremely sequential. A dual core CPU will be noticeable since there are periodic background tasks which often "get in the way" of your foreground task. But a 3'rd/4rth CPU is not likely to be useful at all to non-workstation end-users. (My workstation generally has 8 visible applications, all actively running).
Personally, I think the answer is taking a step back from MHZ and pipelining. Go back to a 3, 4 or 5 stage pipeline with MASSIVE read-ahead decompilation of instructions (similar to transmeta). Get lots of high-speed cache on board with as little latency as possible (current large-cache architectures have HUGE latancies). By lowering the CPU MHZ, you reduce the latency to the all-important main-memory. Advance the state-of-the-art in power-consumption (I've read of several very novel approaches, including decreasing power to the point of statistically acceptible and correctable errors occuring in the computation). Perhaps put a second core on the CPU, but don't just put two identical masks.. Make use of the fact that a CPU has hot and cold regions.. Rewire both devices so they're really one big device with two functional CPUs..
Develop better heat-dessipation techniques.. THey've been very creative over the years.. Flipping the chip so the silicon directly presses against the heat-sink, for example. They've introduced lower-resistence copper as the main wire interconnect, which was a major material-science challenge. Newer exotic materials may provide for better heat conductivity and voltage regulation. The cooler you run a CPU, the higher the power it can dessipate, the more power you can shove into it, the more work you can ask it to do.
-Cheers
-Michael
Electrons move between 0.6 and 0.9 times the speed of light.
That's a pretty fundamental error for someone acting like an expert to make, don't you think? At 0.9c, we don't call them "electrons," we call them "seriously badass beta rays."
It's not the electrons that propagate the signal, it's the potential difference the electrons are at. I have no idea what voltage you'd need to get electrons to be travelling at 0.9c, but I'd put it well into the MeV range.
Here is a better overview of the changes and feature additions
Hey look no pointless curley braces or semicolons... just like Python
This is partially a manufacturing issue.
Since all the chips in a given line use the same core, they all have the same speed paths, ie some signals take longer to get from A->B than others because of more logic, longer distance, etc. The difference comes in during manufacturing. These companies are good at making transistors, but they don't get them perfect every time. When a chip is designed, they look for a theoretical maximum/minimum speed. If a chip doesn't meet the minimum speed at production is is scrapped, this is relatively rare considering the complexity.
On the other end you have chips striving to make maximum speeds. If every chip off a die could be rated at the maximum speed, that would be quite a feat, but it doesn't work that way. After the chips are made, they perform speed tests on them and "bin" the chips.
Chips get placed in lower bins for one of two reasons.
(1)some of the transistors weren't quite up to par during testing/"binning" and ran a little slower and would become unstable in the higher speed ranges
(2)they have to drop a chip into a lower bin for market segments, ie this speed is popular and we're out of them... take the next speed up and drop them into this slot.
That's why sometimes overclocking works, and sometimes it doesn't. It's more likely to work on second gen chips, as they work out glitches in the manufacturing process and more chips are "artificially" lowered in clock speed. That's also why there's a risk in overclocking, if you have a chip that made it into the lower bins because of a manufacturing inconsistency, the chip will be unstable at higher speeds, generally only reasulting in calculation glitches, but possibly physical damage, depending on problem.
-Anonymous Computer Engineer
Because, since the amount of work done by an instruction on one processor differs from the amount done by the same instruction on another processor, it was a rather _Meaningless _Indication of _Processor _Speed.