Self-wiring Supercomputer

redcone writes "New Scientist is reporting on an experimental supercomputer made from Field Programmable Gate Arrays (FPGA) that can reconfigure itself to tackle different software problems. It is being built by researchers in Scotland. The Edinburgh system will be up to 100 times more energy efficient than a conventional supercomputer of equivalent computing power. The 64-node FPGA machine will also need only as much space as four conventional PCs, while a normal 1 teraflop supercomputer would fill a room. Disclaimer: At this point in time, the software needed to run it, which is the key to the project, is vaporware. "

Comments

Not new, but a promising avenue

[AKAImBatman]

FWIW, this is not a new idea. FPGAs (i.e. dynamically reconfigurable processors) have been around for about 20 years now, and have allowed hardware developers to produce custom hardware in many situations. The key, you see, is that hardware designed for a specific task is almost always going to perform that task better than a general purpose processor. That's why the SaarCore can outperform a P4, and why your computer has a custom built GPU.

As a result, the idea of runtime-dynamic hardware sounds great. Unfortunately, the issue that developers run into in developing a runtime-dynamic processor is the matter of knowing how to configure the chip. One tack is to allow programs to load chip designs themselves, thus creating specific hardware for that individual program. The down side to this tack is that someone must go through the time consuming task of manually writing the chip in a Hardware Design Language such as VHDL or Verilog. Most programmers aren't going to do this when they can get the program out faster with a general purpose CPU.

This has led to another tack of using software to analyze a program and automatically create a machine to optimize it. This is conceptually similar to the Java JIT method, but is more complex by far. A lot of research is being done into this area (as this story shows), but I wouldn't hold my breath for now.

Another design that makes a lot of sense is the concept of "hardware on demand". i.e. Imagine if you had a library of accelerator chip designs. Whenever a program needs a particular form of common hardware acceleration (e.g. GPU, Sound, DSP, etc.), the onboard FPGAs could be reconfigured to meet the demand. This wouldn't have the same punch as task-specific hardware, but it would provide an inexpensive method for obtaining a bundle of hardware that would otherwise be extremely expensive and use up a lot of bus space.

Re:Teraflop computer fills a room?

[BurntNickel]

How does the playstation 3 manage 2.2 teraflops without being the size of a house then?

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