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Self-wiring Supercomputer
redcone writes "New Scientist is reporting on an experimental supercomputer made from Field Programmable Gate Arrays (FPGA) that can reconfigure itself to tackle different software problems. It is being built by researchers in Scotland. The Edinburgh system will be up to 100 times more energy efficient than a conventional supercomputer of equivalent computing power. The 64-node FPGA machine will also need only as much space as four conventional PCs, while a normal 1 teraflop supercomputer would fill a room. Disclaimer: At this point in time, the software needed to run it, which is the key to the project, is vaporware. "
FWIW, this is not a new idea. FPGAs (i.e. dynamically reconfigurable processors) have been around for about 20 years now, and have allowed hardware developers to produce custom hardware in many situations. The key, you see, is that hardware designed for a specific task is almost always going to perform that task better than a general purpose processor. That's why the SaarCore can outperform a P4, and why your computer has a custom built GPU.
As a result, the idea of runtime-dynamic hardware sounds great. Unfortunately, the issue that developers run into in developing a runtime-dynamic processor is the matter of knowing how to configure the chip. One tack is to allow programs to load chip designs themselves, thus creating specific hardware for that individual program. The down side to this tack is that someone must go through the time consuming task of manually writing the chip in a Hardware Design Language such as VHDL or Verilog. Most programmers aren't going to do this when they can get the program out faster with a general purpose CPU.
This has led to another tack of using software to analyze a program and automatically create a machine to optimize it. This is conceptually similar to the Java JIT method, but is more complex by far. A lot of research is being done into this area (as this story shows), but I wouldn't hold my breath for now.
Another design that makes a lot of sense is the concept of "hardware on demand". i.e. Imagine if you had a library of accelerator chip designs. Whenever a program needs a particular form of common hardware acceleration (e.g. GPU, Sound, DSP, etc.), the onboard FPGAs could be reconfigured to meet the demand. This wouldn't have the same punch as task-specific hardware, but it would provide an inexpensive method for obtaining a bundle of hardware that would otherwise be extremely expensive and use up a lot of bus space.
Javascript + Nintendo DSi = DSiCade
From this point forward, no Terminator references will be permitted. ;-)
Do you like German cars?
great list of resources from WP on FPGA if anyone's interested in reading more:
these things will be a sort of pinkish grey with a funny convoluted surface appearance, weigh a few pounds, and float in tanks of clear liquid.
Is it fascism yet?
Longhorn to be released.
field programmable gatorade...
But will is be able to run Duke Nukem Forever?
No. But a spelling / grammar checker might be doable.
Besides, FPGAs have two issues that make them good only for a very specific set of apps. Number 1, they don't currently have great floating point performance - this is a killer for most scientific apps. Number 2, they are hard to feed because the rate they can compute at versus the rate memory can feed them is quite skewed. Regardless, they're still very promising. The reconfigurable computing team at LANL (http://rcc.lanl.gov/) has done some very cool things with FPGA based systems.
How does the playstation 3 manage 2.2 teraflops without being the size of a house then?
Has it already wired itself to imagine a Beowulf cluster of itself?
So, this is still vapourware.
LARC, at NASA, built an FPGA supercomputer. Here's a link to a related paper from 2002. Note, its a PDF.
Additionally, Cray builds an FPGA using supecomputer in its XD-1. It's definitely a nonvapourware project since they've sold over 15 of them. Yes, yes, it also uses Opterons, but they're paired with FPGAs.
Additionally, prior to Seymour Cray's death at the hands of a drunk driver, he was looking into FPGAs as his next stab at supercomputing.
Do you know why the road less traveled by is littered with the bones of the unwary?
There's a company that has been selling this type of system for a couple of years.
They also have their own language called Viva to be able to program the computer.
Link: http://www.starbridgesystems.com/
--- Reality doesn't care about your opinions, it happens anyway and if you are in the way you'll get squished.
It's a research project for Edinburgh University, not a commercial enterprise.
Deleted
Ah, the fame and fortune...
As a software design engineer at Nallatech, I'm pretty chuffed we came up on Slashdot.
Not wanting to come across as a pedant...
"software needed to run it, which is the key to the project, is vapourware"
This is not the case, with Nallatech's software is capable of providing the intercommunication (DIMEtalk), the low level control (FUSE) and the Algorithm implementation (double and single precision floating point cores, as well as a new tool, currently in beta, to simplify their use by developers).
"Nallatech, a company that makes software tools for FPGA programmers".
This is true, however we do equal amount of hardware and firmware development.
More info:
Read our white paper about supercomputing for the oil and gas industry, reg required I'm afraid?
The foot print of this thing could be tiny, as you can get 9 Virtex 2 pro FPGAs (Using BenBLUE-3 modules) on a BenERA Carrier card, and you can get 4 BenERAs into a cPCI rack, so to get 64 FPGAs you just need 2 standard cPCI racks. Since you can get 4 cPCI racks into you standard 19" server rack, which would kick out a massive 2 Teraflops.
Though, I can't help but think Cell processors might kick our asses, at least a little bit anyway. Sorry about all the links to Nallatech, just pointing folk to the info. Oh, by the way, I think the 1 Teraflop for 64 FPGAs is a very conservative estimate.
GenoByte has found a more novel use for FPGAs, which they call "evolvable hardware." Much like our own brains neural networks on the FPGAs reconfigure the way they interconnect on the fly; commonly used paths are reenforced while less frequently used ones atrophy.
Here are some cool pictures:
The CAM-BRAIN machine, a big box full of FPGA boards: http://www.genobyte.com/images/machine.jpg
Neural network layout for the XC6216 FPGA: http://www.genobyte.com/images/chip.JPG
All in all this approach is substantially faster than modelling large neural networks on a general purpose processor. In the GenoByte approach, the neural network is implemented as physical circuits.