HP Introduces Final Processor in PA-RISC Family

The HP Way writes "According to an article on InformationWeek, HP announced the immediate availability of the 800 MHz, 1.0 GHz, and 1.1 GHz dual-core PA-8900 with 64MB on die L2 cache, the last member of the PA-RISC family of microprocessors. Customers with Superdome chassis can install Itanium 2 CPUs alongside PA-8900 processors."

Comments

Another one bites the dust.

[darkjedi521]

Yet another CPU architecture bites the dust in favor of the behemoth that is Intel.

Re:Another one bites the dust.

[linguae]

It is truly a sad state of affairs when it comes to processors. In the PC market, now that Apple has been consolidated^Wswitched to Intel, now the x86 is the only architecture available, either from Intel or from AMD. The Alpha is dead, the PPC is now relegated to game consoles, the MIPS is relegated to embedded computers and SGI workstations, and the SPARC is also relegated to Sun workstations. There is no choice for me at all. Unless I want to shell out $5000 or more for a brand spanking new Sun/SGI workstation, scrounge on eBay to find old Alphas, or buy myself a Mac within the next year now, I will be stuck with the x86....forever.

Rob Pike said it best five years ago: there is no innovation in computer architecture and systems software at all. Everybody is focused on being "cheap" and "compatable," but nobody is focused on making an architecture that is elegant and of good quality. Nobody wants to make a new architecture that blows everything else out of the water. Nobody wants to revolutionize operating systems (I'm talking about the architecture, not the usability; Apple's doing well in the usability department). Simply put, nobody wants to try something different. And anything that wasn't Microsoft or Intel technology ends up getting destroyed. Unix was spared, but market consolidation between Unix variants and Microsoft operating systems killed many operating systems (VMS, pre-OS X Macintosh, the various Lisp operating systems, etc.). Anything new and innovative seems to be held back (for example, look at Plan 9 and Hurd).

I just wish someone would be innovative and produce architectures that advance computer science and computer engineering rather than by just "going with the flow." I want to see something fresh and new on the market. I want to have the same processor choices that people enjoyed back in the 1980s. I want to see something new coming out of those factories and those universities. I don't want architecture research to die forever. I don't want Netcraft confirming that alternative architectures are dead. I don't want Intel and AMD to be the only avenues to buy CPUs: what happens when they impose DRM on us? Intel and AMD are already in the Trusted Computing Group. Who would we run to once Microsoft demands the use of DRM'd processors in Windows 2010 and Intel and AMD begin producing their DRM-encumbered processors? We need choice, and we need change before it's too late.

Until then, where can I buy PPC, SPARC, or MIPS motherboards?

Damn

[Stevyn]

Before anyone says anything about the clock speed not being fast compared to Intel or AMID offerings, 64MB of cache is a heeeelll of a lot of cache. So all those delays from cache misses can be spent doing something meaningful...like processing.

I blame the Itanium

[SoupIsGood Food]

This is a fairly sad state of affairs... the processor family really has some legs left to it, but it was killed by HP for mostly political reasons. Itanium has never really delivered the goods, and is likely to be killed sooner rather than later by Intel, who does not know how to run a small volume/high margin performance chip line. (See: i860, i960) nor does it really see the value in such products.

Wherer this will leave HP is anyone's guess. Off-the-shelf Pentiums or Opterons can't really compete with POWER or Fujitsu's next gen SPARC designs. x86 Unix systems have largely been also-rans... Data General, Sequent(Now IBM xSeries), even Sun's new Opteron boxes are largely a side show to their SPARC business.

The Itanium, and the bone-headed wintel-centric management who pursued the pipedream of IA-64, killed off a lot of prime high-performance processor srchitectures: Alpha, Mips, and now PA-RISC. These aren't market or competitive pressures ('cuz IBM's doing just fine with bespoke silicon at the high end), but political mangement dictates that turned some premier computer science powerhouses into shambling wrecks. I mean, what the hell has SGI done in half a decade that's caused anyone to talk about them in positive terms? Nada.

This "mass extinction" of competing hardware architectures is not good for innovation. The Wintel PC is not the pinnical of hardware architectures, it's pretty bass-ackward and stone age compared to what used to be out there. Sad times.

SoupIsGood Food

Re:I blame the Itanium

[Waffle Iron]

This "mass extinction" of competing hardware architectures is not good for innovation.

The user-visible instruction set doesn't matter anymore. There's a wide variety of different architectures under the hood of the various x86-compatible implementations, and these will continue to evolve and improve. The real CPU architecture looks nothing at all like the interface presented to the programmer; this is even true for most recent RISC chips.

If non x86-compatible instruction sets provided a significant benefit, then CPUs using them would have been able to hold a substantial and lasting performance lead over the x86-compatible CPUs. But they haven't. When somebody claims that an alternative CPU architecture is beating the top-end x86 chips, it's usually just because they've slapped a massive cache next to the core. It has little if anything to do with the instruction architecture itself. The x86 instruction format is just a standardized compact bytecode that is translated to the latest features by each generation of x86-compatible microprocessor.

If you can make essentially the same progress without breaking compatibility with a huge body of software which has received so much massive investment, what good does it do to break compatibility?

Re:I blame the Itanium

[Waffle Iron]

The PA-RISC, Alpha, and Mips chip families were all way out in front of the x86 before they were put into maintenance mode by HP and SGI in anticipation of the IA-64 architecture, which never did deliver on it's price/performance promises.

That was before the x86 decoupled the inner workings from the instruction set. That's ancient history.

IBM's POWER is way out in front of the performance sweepstakes, and unlikely to be axed any time soon on the P and R series servers. Ditto the Z-series "SuperCISC" mainframe processors.

All of that is due to insane cache sizes, heavy I/O bus technology, and the hugely expensive packaging that goes with them. Cram all of that around an x86 core and you'd get similar results.

The "skin" required to make the instruction set work with bleeding edge designs like Cell just isn't worth the hassle or performance overhead.

The Cell isn't just one processor; it's a processor plus a bunch of DSPs. Nothing is stopping you from adding a bunch of DSPs to an x86 die.

The x86 instruction set is bloated and crippled

The subset of instructions that modern compilers actually issue aren't bloated, and they use up fewer bytes than space-hogging RISC opcodes. The "bloated" instructions of old are handled by a little bit of microcode if they are encountered. The x86-32 was somewhat crippled, but that was mostly worked around with tricks like renaming. The x86-64 isn't crippled.

and making the Itanium interoperable with it nearly sunk the chip entirely.

It was sunk because they thought that they could get away with shoving most of the branch prediction logic up to the compiler, which doesn't know anything about the actual runtime conditions. While the idea seemed appealing, it didn't work. An other example of how "advanced" instruction set architectures don't really buy you anything in the real world.

Allan Kay was dead right in that hardware needs to accommodate the programmer, not the other way around.

That's right, it needs to do the job as good as any alternative without making the programmers rewrite all of the software in existence.

Re:Survival of the strongest

[imsabbel]

but looking back, the alpha wasnt powered by magic either....
It was way faster than anything else, but it bought that kind of dominance by using something that now limits x86: A massive power budget.
Alphas used 80W+ back in times when 25W of a pentium2 seemed horrendious, so its not that miraculous that they got more performance out of it.

Well look at every new CPU to see if RISC matter!

[renoX]

Uh, how the PA-RISC, PPC, Sparc failures in the PC or server has anything related to the RISC concept?

If memory serves, the G5 has 1/4 the number of transistor of the P4 and it was competitive in performance.
The problem is more that even with much less transistors the economy of scales of x86 (and the intense competition between AMD and Intel), made the price very low, thus allowing x86 to compete with RISCs where it matters in the price/performance ratio, Windows and software compatibility made the rest..

Have you noticed how any new CPU is RISC?
ARM, SH, etc.. Even VLIW follow RISC conventions (fixed instruction length, load/store architecture, etc..).
So it really is a better CPU architecture than CISC but being better doesn't necessarily that you win, as shown by many examples..