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HP Introduces Defect-Tolerant Nano Elements
versicherung writes "With the ever shrinking feature size in microelectronics it will soon be prohibitively expensive to manufacture defect-free nano elements. HP has come up with a new way to produce fault-tolerant microchips. Utilizing mathematical techniques borrowed from coding theory, HP will be able to produce those chips by using a cross-bar architecture and adding 50 percent more wires as an 'insurance policy,' to fabricate nano-electronic circuits with nearly perfect yields even though the probability of broken components will be high."
Does that mean that the phrase "thats not a bug thats a feature" will now be an accepted marketing term? Untill true nanofabrication becomes available this will become the standard thruout the industry. Now the question, is there a copyright on fault tolerent circuts? Prior art anyone?
"It's so convenient to have a system where everyone is a criminal" - A. Hitler
Seing as how about half of all produced microchips have to be tossed for defects, and many advanced manufacturing methods are prohibitive because of the inability to produce defect-free chips, I'm sure that a lot more companies than HP will have a strong interest in this.
:)
Imagine being able to jump to a lower-micron manufacturing process far earlier because you don't need perfection. Intel and AMD would love that.
"This wallpaper is killing me. One of us has got to go." -- Oscar Wilde on his deathbed
Once the defect rate is low, the extra 50% more wires will just take up unnecessary space and increase production costs. But for now, it seems completely acceptable to up the production costs and size in order to get yields higher.
This kind of concept is already in use throughout the rest of the microprocessor world - Intel (maybe AMD too, I dunno) has extra cache lines in their microchips, and they deactivate defective cache lines, and reroute them to the "spare" lines to improve yield.
The Doormat
If you're not outraged, then you're not paying attention.
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Your assumption is that wire is the only cost in making a chip. A microchip requires lots of steps in the process and that's the majority of the manufacturing cost Wires are just additional metal layers, so long if you can get away adding a couple of layers, the additional cost is minimal.
What I would worry about is more on the chip perfromance side of things - namely the additonal capacitance loading, cross talk and the overall routing density for this approach.
Children,
Before there were computers, people sometimes checked the accuracy of their arithmetic by "casting out nines" (google for it). When computers were big things full of vacuum tubes that had the tendency to go out in the middle of a calculation, people used parity-checking to ensure the integrity of the calculations. Coding theory has come a long way since then , with new schemes for different applications, such as crypto and telecom (from TFA). The principle is old, but I'm sure these guys had to come up with some clever ideas to apply to the problem at hand.
What happens with components that are not "bad" but are "on the verge" and can go bad any minute? Something tells me that there will be a lot more of those in a chip where "bad" components are perfectly fine. They're impossible to detect, too, because during QA they'll work perfectly fine.
I see this tech as a temporary crutch for something more advanced - self diagnosing and self-healing chips. Now that would be frikkin' cool.