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IBM-Sony-Toshiba Reveal New Cell Processor Details

BBCWatcher writes "The three main partners in the Cell Processor initiative announced technical details of the new architecture. IBM's documents are particularly revealing. There's much more information on how developers, including open source developers, can access the SPUs (Synergistic Processor Units). As reported earlier, Sony will put the Cell into every Playstation 3 game machine, due early next year. And yes, Cell runs Linux."

3 of 204 comments (clear)

  1. PS3 Runs Linux? by nukem996 · · Score: 3, Interesting

    I heard a rumor awhile back that the PS3 will be running a stripped down version of Linux, just like the XBox/XBox 360 run a stripped down version of Win 2k. It does seem to make sence since the Cell processor runs Linux and NVIDIA(the PS3 will use a NVIDIA graphics card) has been known for great Linux and OpenGL support(I also heard all PS3 games will use OpenGL).

  2. Soft Cell by Doc+Ruby · · Score: 3, Interesting

    Sony offered Linux on the PS2 partly as PR stunt, partly as a way to offer a cheaper dev system than their $100K dedicated HW. But they distributed it with only a proprietary "BIOS"/bootloader, which meant developers couldn't distribute bootable discs even if they blew off the license which said they weren't allowed to, not without Sony's approval. And they distributed their proprietary boot disc only bundled with their $200 ethernet/HD. Plus it only worked with a select few "sync on green" monitors. So the whole thing was mostly a really tiny niche hobby, rather than a new Linux architecture. Let's hope Linux on PS3 has a chance to play with the big dogs.

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    make install -not war

  3. Re:Synergistic Processor Units? by ameline · · Score: 5, Interesting

    Not just buzzword compliant, but confusing as hell for those of us who have been in the know for a while.

    To me, SPU always made me think "Scalar Processing unit", while PPE made me think "Parallel Processing Element".

    Of course that's exactly backwards.

    That, and I choke on words like "synergistic" because they peg my bullshiat-o-meter way off in the red.

    In my opinion one of the coolest features of this architecture are the way the reciprocal estimate and reciprocal square root estimate instructions work.

    In a single cycle you get 13 good bits of precision -- with the low order bits filled with information to be used by the floating point interpolate instruction.

    You can get a full precision (32 bit ieee float) reciprocal in about 6 cycles, and a 1/sqrt in 7 or so. Oh, and that's 4 results in that time. Averaging 1.5 cycles per FP divide, and slightly more for sqrt. times 7, times 3.2 billion per second, and the bandwidth to feed it.

    That's several orders of magnitide faster that you could do with any x86 part out there.

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    Ian Ameline