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Next Generation Chip Research

Posted by ScuttleMonkey on from the bet-you-can't-eat-just-one dept.

Nyxs writes to tell us Sci-Tech-Today is reporting that researchers at the University of Texas are taking a new approach to designing microprocessor architecture. Doug Berger, a computer science professor at the University of Texas, and his colleagues hope to solve many of the pressing problems facing chip designers today with the new "microprocessor and instruction set architecture called Trips, or the Teraop Reliable Intelligently Adaptive Processing System."

3 of 174 comments (clear)

  1. pressing problems by ed__ · · Score: 5, Funny

    apprently, one of the pressing problems that chip designers are facing is coming up with stupid, meaningless acronyms.

  2. It uses the LSD technology ... by Articuno · · Score: 5, Funny

    Bugs on the chip can lead to bad Trips

    --
    So Long and Thanks for All the Fish!
  3. You've all got the wrong idea by Takahashi · · Score: 5, Interesting

    This is not some boring super scaler! Nor is it some vector processor!

    in fact this is a complete departure from a von Neuman architecture. The architecture is called a Dataflow architecture. In one sentence a dataflow architecture is one where instruction execution is based on the availability of the instructions inputs not a program counter.

    The article does a very bad job at conveying the fact that this is a relatively new idea. Like most reporting they report something thats been in research for some time as a huge breakthrough without describing it at all. Instead its really just an incremental step in dataflow computing research.

    I work in a lab at the University of Washington on another dataflow architecture. Its a really interesting idea but it will take some time to develop and you're not going to get one on your desk for some years to come.