Intel Lindenhurst Xeon DP Platform Discussion
Steve from Hexus writes "Hexus.net has a article looking at Intel's latest Xeon platform: Lindenhurst, discussing the Paxville dual-core processor, E7520 core-logic, where it could go right for Intel, and where it could all go wrong." From the article: "If you're I/O bound by your threads in any way, you can hit problems (all threads touch the MCH, then there's a 266MiB/sec bus link to the I/O processors to cross, then the data hits disks or network hardware). If you're memory subsystem bound in any way, especially on a majority of compute threads, performance is likely gone. There's just too much resource sharing for it to all conceivably work well, especially compared to Opteron. I can forsee many a scenario where dual-core Opteron will give Paxville Xeon DP a beating."
there's a 266MiB/sec bus link
Wow - that's a *LOT* of Tommy Lee Joneses and Will Smiths!
cost 3 times as much as the 820D ... it's a copy of the 820D ... see where I'm going with this?
:-)
The dual-core intels may cost half as much as the dual core Athlon64s but they still suck twice as bad. What you save in initial purchase cost you lose in electricity bills and time doing work.
The fact they're STILL making Netburst based processors just sickens me. Give it up already and go P6 or something new. I mean if they put half the money they put into the netburst into the P6 designs of late they'd already have a 2.5Ghz P6 core that would give AMD a run for their money.
I think the cats out of the bag for the most part. And not like you're gonna sell a lot of dual-core based Dells to grandma so she can write emails.
Times like this make me feel proud I'm an AMD whore
Tom
Someday, I'll have a real sig.
Got a plain old dual processor 1GHz box that with video and hard drive upgrades is still competent. It does everything I need it to do, although processor- or memory-intensive processes are getting a bit sluggish. Rendering video takes a little time, but that's more because the application I use renders in a single thread - but I can play games and render video at the same time ;-)
I still believe if you could remove all the latency from I/O subsystems in a modern PC you'd have more processor than you could use by a longshot - IMO high-end PCs just wait for data faster than older machines, and a lot of the performance boost you see with a new machine is simply masking latency in other subsystems.
PCI-X and improved memory bandwidth will solve some of these problems, but it's a bandaid at best. I do tend to chuckle at people buying the newest/fastest peripheral, not understanding that a lot of the time the peripheral will talk faster than the nine(?) year-old PCI bus that's feeding it.
When troubleshooting performance issues the component that's working at 100% capacity is *always* the bottleneck - and with most home and business users, that bottleneck is almost never the CPU itself.
we see things not as as they are, but as we are.
-- anais nin
I'll admit that I'm no great expert on the details of multi-core, hyper-threaded CPU design, but from what's in the article isn't the memory access bottleneck a rather fatal, and obvious, flaw in the whole design? Unless I'm missing something, I'm really struggling to see how this got off the drawing board. What is it's point if the only applications that can ever take advantage of it are the very few that rarely need to access main memory?
Yep, I'd say that if both her input and her output are busy, she's DP.*
*See, kids? This is why you should avoid too much pr0n, it just totally warps your mind.
Are you...Are you some kind of genius?
No, ma'am, I'm just a regular Slashdot reader.
What's next, DVDA?!!!
Hehehe.. type that into Google and hit "I'm feeling Lucky". Good for a laugh. Almost as funny as the National Association of Marlon Brando Look Alikes (or even funnier, as it's real.)
I used to live on Lindenhurst in NY (on LI). I was once told that it had the most bars per square mile in all of the US.
William of Ockham had no beard. The most likely explanation is that it was chewed off by squirrels every morning.
I just put together a Xeon based server. It was a rare case where a Xeon solution met my needs better than an Opteron based solution.
My company is _very_ sensitive to power consumption. So, I picked a very new motherboard from Tyan, and a Xeon that supported Enhanced Speed Step. I figured that I'd install cpudyn, like I did with all of our AMD boxes, and save a few bucks on electricity.
So, cpudyn doesn't work... because Speedstep isn't supported by Tyan's BIOS. I email Tyan, and I find out two things:
* Tyan wasn't aware that Speedstep was an option on the Xeon platform,
* That none of their BIOS suppliers are supporting Speedstep at this time.
Amazing! Intel put this in the CPU as a way to compete with this great feature from AMD, but you CANNOT USE IT.
Most certainly my last Intel purchase, ever.
jh
The Hexus article is just a summary of their results along with several inaccuracies.
This is misleading. First off, the MCH is a 6.4 GB/s link so I dont understand how it could bottleneck I/O even if you're compute bound. The 266 MB/s IO bus is for legacy peripherals (USB/serial/SATA). Considering SATA-I (what the ICH5R supports) is 150 MB/s per channel, and USB is 400 Mb/s I cant see how this is a big problem. If you want fast (SCSI/FibreChannel/SATA-OII HW raid) disks and network, there are PCI-X 64bit and PCIe x4, x8 slots that you can have your important I/O subsystem hanging off of.Here is a link to the intel datasheets for the chipsets which shows 3 x8 PCIe interfaces for the 7520 and 1 for the 7320. http://www.intel.com/products/chipsets/E7520_E7320 /
All that being said, the CPU itself is a dog.
For a single CPU, the quad piped 200Mhz FSB does fine. It can fully utilize two channels of DDR 400 RAM, which is the standard on the better desktop mainboards. A single AMD CPU does not better.
Things are different with multiprocessor setups:
Here each Opteron has its own memory interface, while the Xeons have to share one FSB. As a result, the total Opteron memory bandwith is proportional to the number of sockets. Total Xeon bandwith does not grow with more sockets.
This does show up heavily in reviews of 2-processor machines, expect it to be worse in 4- and 8-way-systems.
C - the footgun of programming languages
The article gets the point of Hyperthreading... backwards.
Yes, the memory interface gets congested, so the processor takes a stall. But, instead of just leaving the ALU idle, it has another thread in reserve to schedule on it. Thus improving the utilization of the ALU subsystem.
And THAT'S the point of this "Hyperthreading" thang...
The rest? Well, if the local L1/L2 cache isn't big enough, you are going to suffer. Yes, a bigger pipe to memory would help, but you are STILL several times slower than you could be. That's why you have the cache.
Anyway, its a balancing act.
Just another "Cubible(sic) Joe" 2 17 3061
Your Xeon system with the SCSI disks is hugely faster doing DBMS than the system with the SATA drive in large part (probably larger than the other reasons you've listed, although those do matter) because DBMSs tend to throw a heck of a lot of disk IO commands at the disk subsystem all at once. The SCSI disks and their controller are simply better able to handle the barrage. I'll be that a test with the drive subsystems reversed shows that while the Xeons are still faster, the P4 is only somewhat behind, not waaaay behind.