Intel Makes 45nm Chip

dolphinlover writes "Intel announced today that it created its first microchip using the 45 nanometer manufacturing process that it says will go into its processors in the second half of 2007. Intel said that this development provides it with a 'considerable lead over our competitors in the 45-nanometer generation'."

Comments

Why do they always screw up Moores Law

[rminsk]

The new chip makes good on Moore's Law, an industry maxim set forth by Intel co-founder Gordon Moore that stipulates the number of transistors on a chip -- and therefore its processing power -- doubles roughly every 18 months to two years.

Who added the "and therefore its processing power" to the quote? Was it the reporter or someone from Intel? Moores law has nothing to do with processing power.

Re:Says You

[the eric conspiracy]

AMD has a co-development agreement with IBM and is planning to introduce 45nm parts in 2008.

Re:Says You

[uujjj]

AMD is nearly a full year behind Intel rolling out 65nm. Intel began volume production at 65nm last summer; AMD will be ramping up in the middle of this year.

While the parent may be joking, down below you'll find a lot of posts from AMD fanboys insisting that AMD must somehow be ahead. These fanboys are as clueless as the average tech magazine reporter. You can be quite certain that AMD will not be ramping up 45nm before Intel.

CNET News article has important additional details

[MojoStan]

Here's a link to CNET News's article on this same news:

Intel shows test chips made on future processes

One interesting (to me) bit of info from the CNET News article:

The 45-nanometer process could become particularly interesting because many chip designers believe it will be one of the more difficult transitions in years. The power consumption and performance requirements of these chips will be extremely high and chipmakers are being forced to add exotic materials and new structures to their transistors to ensure the chips function properly...

"It does get a little more challenging every time, but we come up with new technology and tricks to keep things going," said Bohr.

If a company botches the process, it could lead to product delays or recalls. Some chipmakers faced these problems during the transition to 130-nanometer chips when they swapped aluminum for copper for making interconnects--the tiny wires inside chips.

Although Intel might have a "considerable lead over our competitors in the 45-nanometer generation," it doesn't appear that this transition is expected to go as smoothly as their transtion to 65nm (which seems very smooth). Remember Intel's and IBM's difficult transitions to 90nm.

Re:What about AMDs 45nm???

[TheRaven64]

Wow, the AMD fanboys are out in force tonight. From this source, which is three months old and so relatively recent:

• AMD's new fab, Fab 36, supports 300mm wafers (like Intels have for some time).
• It uses a 90nm process (Intel and IBM have been on 65nm for some time).
• It will transition to 65nm by the end of 2006.
• It will use 45nm and 32nm processes by the end of the decade.

It doesn't really sound like Intel is playing catch-up here.

Re:Aren't we getting close to the Theoretical Limi

[uujjj]

molecule? This is a crystal we are talking about, so the entire wafer is a "molecule". An atom of Si is about .3nm across.

Right on schedule

[Anonymous Coward]

Intel's logic development is striving for a two-year cycle for each new process technology. This announcement of functional first-silicon (who knows how long they've actually had it) is part of that natural progression. Here's a table showing this announcement along with previous SRAM test chip announcements:

Process
Litho
Size
Date

P860
130 nm
18 Mbit
Mar 2000

P862
90 nm
50 Mbit
Feb 2002

P1264
65 nm
70 Mbit
Apr 2004

P1266
45 nm
153 Mbit
Jan 2006

Okay ... it's not a table...

Re:Says You

[georgewilliamherbert]

Silicon On Insulator; see the silicon on insulator wikipedia entry for a high level summary, or google the phrase for more details.

Basically, instead of a solid slab of silicon on which you fab chip components, you put a solid slab of an insulator (sapphire / alumina for example; see silicon on sapphire wikipedia entry) down and then an insulating silicon oxide layer, and then a thin layer of silicon on which you fab the parts. Since what's under the parts is insulator, rather than more semiconductor, it reduces the energy of switching and reduces the time to switch a transistor. Also reduces radiation effects on the semiconductor and other good stuff.