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Moore's Law Staying Strong Through 30nm

Posted by ryuzaki0 on from the there's-plenty-of-room-at-the-bottom dept.

jeffsenter writes "The NYTimes has the story on IBM with JSR Micro advancing photolithograhy research to allow 30nm chips. Good news for Intel, AMD, Moore's Law and overclockers. The IBM researchers' technology advance allows for the same deep ultraviolet rays used to make chips today to be used at 30nm. Intel's newest CPUs are manufactured at 65nm and present technology tapped out soon after that. This buys Moore's Law a few more years."

2 of 199 comments (clear)

  1. Enough to run the DRM... by Captain+Zep · · Score: 4, Insightful
    Unfortunately most of the extra processing speed this gets you will be sucked up the all the DRM software running sefl-checks on itself, calling the mothership, and triple checking that you are licensed to excecute the next instruction.

    So your computer will be nice and fast, just not any of your applications...

    Z.

  2. Re:Well, NO. by lbrandy · · Score: 4, Insightful

    * Lines are 2-D thingies, but conductors are 3-D. Your etching technology has to get X times better to keep up with the line-drawing technology.
    * Same thing with the active components. If you try making the transistor half the old linear dimensions, you have 1/8th the volume of active silicon. This leads to all kinds of problems with leakage and power handling capability.
    * A line that's half as wide and half as thick has four times the resistance per unit length, and 1/4 the current-carrying capacity. You can try using a better conductor, but once you get to using copper, you're done.
    Why do I get the feeling that you actually have no idea what you are talking about, and neither do the people who modded you up. Etching, depositing, and lithography all go hand in hand when talking about an Xnm "process", therefore your comment about "thinner lines", in fact, makes no tangible sense. Lithography is the most difficult to shrink, not etching, so I'm really failing to see your point. It has been the main technical hurdle for the past 10 years.

    Furthermore, the "conductors" in a processor aren't nearly as dependant on size as the silicon-feature construction. You can have an extremely layered chip with larger conductors if need be (and modern chips are), so both comment #1 and #3 are reasonably meaningless.

    As for comment #2, yes, you are right: the "smaller transistor" problem is very well understood and it's the reason it takes so long to construct smaller and smaller processes, because the physics and effects must be taken into account. Not all transistors on a chip are the same size, nor can all transistors be shrunk. There is a reason that Intel doesn't slap it's PentiumIV plans into the new 30nm machine, and out comes a new chip. They have to go through and make sure that all the transistors that can be shrunk are, and none of those that cannot, are not. This is a reasonably non-trivial task, but it is not impossible, nor a "large can of whup-ass".

    (PS: Thanks for the math lesson about 2d vs 3d in part 1. You might want to recheck part 3, with that in mind.)