Japan's New Supercomputing Toy
deman1985 writes "As reported by UPI, Japan has unveiled their fastest supercomputer yet. Assembled from Hitachi and IBM components, the new system sports total performance around 59 trillion calculations per second and comes at a cool 5-year lease price of $30 million. Pictures of the beast can be found at Mainichi Daily News."
They're gonna ask the public for research themes? ... AFTER THEY BOUGHT IT???
:-)
I'd love to see this from top500.org
name,where,how many processors,average FLOPS,max FLOPS,***actually being used FLOPS***
Then sort it based on the latter.
Tom
Someday, I'll have a real sig.
*sigh* I miss when that was popular...I was in college, dating a total bitch, living off of ramen, playing CS until my grades started to suffer, and getting four hours of sleep a night...good times, good times.
Shit. That's my life right now, and trust me...it ain't good times...
Then again, maybe a few years down the road, when I have a shit job, married to a total bitch, living off of ramen, and still play games till the wee hours in the morning, I'll be able to reflect and think, "yeah...good times...good times..."
Wow. That just made me even more depressed.
*SIGH*
Reportedly, it is just fast enough to use Windows Vista’s Aero Glass GUI.
Have we had another moderation system failure... the number of posts making it to my +3 browsing has dropped dramatically in the last two days... I'm expecting there to be almost minimal moderation after today and it to be a general trollfest again by Friday...
Donald 'Duck' Dunn: We had a band powerful enough to turn goat piss into gasoline.
59 trillion calculations a second equals exactly 59 teraflops, of which, 57.3 of the 59 teraflops is from a smallish IBM Blue Gene.
Lawrence Livermore National Laboratory has an IBM Blue Gene that does 280.6 teraflops or 280.6 trillion calculations a second.
In other news, South Korea unveiled its new supercomputer: KEKEKE ^____^
N4st0r, trixx0r h0bb1tz0rz! Th3y st0l3 0ur pr3c10uzz!
> They're gonna ask the public for research themes? ... AFTER THEY BOUGHT IT???
;)
;)
;^)
This is not unusual.
Universities around the world are filled with expensive equipment that doesn't get much use.
What usually happens is that somebody has a vague idea for a research project, applies for a funding grant, but doesn't expect to get it, and then three years down the track the grant gets approved, and you have to buy something that you never expected to get, and you're not sure what to do with it.
Part of my job is making such expensive purchases accessible by as many people as possible.
I have access to 4 clusters at the moment, and all four have been 99% idle/underused from the day they were bought, and will continue to be so until I've had a go at them. I've got one cluster to the point that it is now being used to 100% of it's capacity and I've just started on the second one. (This second one has been mostly idle for nearly two years now)
It's quite interesting to note that once people can make full use of a cluster, they will quickly come up with ideas and projects that will start pushing the cluster to it's full capacity.
Heck, Weta FX (Responsible for in Lord of the Rings and King Kong, but I'm pretty sure you knew that
ran short of rendering grunt for the final battle scene in Return of the King.
(The battlescenes with all the oliphaunts)
So they rang the producers and got funding for another IBM Blade cluster, at approx $4m (something like that)
Bought it, build it, used it for LOTR, used it for a little bit of rendering for two other movies - Zorro and Van Helsink I think - and then it sat idle for a year!
I'll start work on that one soon, I've got access about 150+ 2.8Ghz Intel Xeons that need a good workout
(No, none of the clusters run Windows - sorry - and not a single beowulf cluster
Indeed, that is one of the reasons IBM is so proud of their new Cell architecture. It was designed to reduce the latency between CPU and RAM, perhaps more out of necessity than by choice. IBM wanted to reduce the complexity of the processor by moving a lot of the out-of-order-execution, register renaming, branch prediction, etc... logic off the silicon and into the compiler. Transmetta tried the same thing in the past, but found it only compounded memory latency issues. It works out for the Cell architecture, however, since it is designed around parallelism -- with a lot of the complexity dumped on the compiler, there is a lot more room on the die for more SPFs, cache and other logic. It should be interesting to see if the theory actually works beyond paper... it sounds like playing musical chairs with bottlenecks and praying compiler developers will do the really hard work. ;)