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Cray Introduces Adaptive Supercomputing
David Greene writes "HPCWire has a story about Cray's newly-introduced vision of Adaptive Supercomputing. The new system will combine multiple processor architectures to broaden applicability of HPC systems and reduce the complexity of HPC application development. Cray CTO Steve Scott says, 'The Cray motto is: adapt the system to the application - not the application to the system.'"
Religion for nerds. Stuff that really matters
"All of these platforms will use AMD Opterons for their scalar processor base.'
:)
Im just loving the vendors picking up on AMD.
Their idea seems very interesting in theory. It sounds like HPC's version of the math co-processor->crypto accelerator idea.
And at least they are not basing the userland on Unicos
-- DotFucked.ORG
It seems like the idea of combining multiple architectures into a single machine is already being done -- we have fast general purpose CPUs (single and dual core x86 offerings from AMD and Intel), paired with very fast streaming vector chips on video cards, which can be used for other non-graphical operations like a coprocessor.
The only difference I see is that they're relying on an intelligent compiler to decide which bits to send to which processing unit, but I'm not sure how much faith can be placed there. Cray certainly has a lot of supercomputing experience, but relying on compiler improvements to make or break an architecture doesn't have a good track record. I'm curious to see how they fare.
It seems the bulk of the article is bemoaning how ineffecient single processor systems are, offering Cray's planned adaptive model as a solution, but surely we've already seen the way forward in regard to supercomputing, and that is distributed single (or dual) processor machines. As stated at zakon.org, "SETI@Home launches on 17 May (2001) and within four weeks its distributed Internet clients provide more computing power than the most powerful supercomputer of its time"
Surely the computing environment hasn't changed so dramatically in 5 years as to make this type of achievement redundant?
Unless 'computing power' is different to 'combined processor speed', I don't understand what Cray are up to here.. perhaps someone can enlighten me?
I always thought that Thinking Machines deserved the award for most "I feel like I live in the future" cool in their computers with the CM5.
STOP . AMERICA . NOW
HPC/Beowulf clusters are about building machines around problems
That is why Clusters are such a powerful paradigm. If your problem needs more processors/memory/bandwidth/data access, you can design a cluster to fit your problem and only buy what your need. In the past you had to buy a large supercomputer with lots of engineering you did not need. Designing clusters is an art, but the payoff is very good price-to-performance. I even wrote an article on Cluster Urban Legends the explains many of these issues.
HPC for Primates. Read Cluster Monkey
It is possible to build comptuers that are optimized for certain kinds of calculations.
For example, Gerald Sussman of MIT (a computer scientist) and a Jack Wisdom (a physicist) decided they wanted to do long-term modelling of the solar system's evolution over time. Long time modelling of a multi-body system requires a fantastic amount of calculation. What is the best way to do it?
Sussman and Wisdom came up with a crafty idea: build a computer that is specially configured at the hardware level to do the modelling. Sussman and his colleagues decided that with off-the-shelf parts they could build a computer that would be just as or more capable of modeling this system than a supercomputer would be. The result was the Digital Orrery, a relativlely cheap computer that gave great results. (It is now featured in the Smithsonian museum.)
Think of it: if your computer is going to be doing the Fast Fourier Transform 6.02x10^23 times per day, why not build a superfast chip that does nothing but the FFT rather than express it as software? It's a pretty cool idea. I think this is the sort of thing that Cray computers claims to want to do with its motto.
In other words, they're working on processors which are programmed in general-purpose languages, but which adapt their hardware to the specific program.
Look on Xilinx's website. The Vertex4's (although currently having supply problems) go up to 500MHz (though you probably don't want to run anything at that speed considering that's probably the reg-to-reg limit). These things are literally better system-on-a-chip solutions than any ASICs could be considering what it offers. Integrated micro-processor, bus architecture, peripheral interfaces and non-volatile and volatile memory, with enough pins (BGA package) to expand with off-chip components. Actel even offers mixed-signal FPGA's where you can have your analog and digital circuitry all programmed onto one chip. These things are the future.
FPGA's aren't the golden answer currently. Most if not all FPGA's have issues with being used this way. They are programmable, but they're not made or intended to be programmed in the field (despite their name). The majority have a programmable life of maybe 1000 flashes with flash-based FPGA's (ProASIC from Actel for instance) having a life of maybe 100 flashes. They're basically a poor-man's ASIC more than anything else. The technology would have to improve significantly in a much different direction than what the main FPGA market is targetted at before they can be used as adaptive circuit components while live.