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HyperTransport 3.0 Ratified
Hack Jandy writes "The HyperTransport consortium just released the 3.0 specification of HyperTransport. The new specification allows for external HyperTransport interconnects, basically meaning you might plug your next generation Opteron into the equivalent of a USB port at the back of your computer. Among other things, the new specification also includes hot swap, on-the-fly reconfigurable HT links and also a hefty increase in bandwidth."
I can only imagine what that could do to us cheap bastards who have small clusters of older PC's sitting in a second bedroom or closet.
"Hum... I can't quite afford a whole new system or even a motherboard and two new procs... I'll just add a new one to the back of an existing one"
At last! The day of easily being upgrade to a multi-proc system may soon be at hand! (assuming they also have some sort of... external hub device).
Help Brendan pay off his student loans
Somehow I doubt this will become available on hyper-transport 3...
I really can't see it being that kind of socket!
For now why dont you just stick with your 'Current Solution' and stop dreaming that you need all that extra 'Bandwidth'
Maybe they should integrate the RAM in to the CPU or something.
Hrm... Need a temporary boost in your folding at home project? Plug in an FPGA module!
This can only be a good thing.
"you might plug your next generation Opteron into the equivalent of a USB port at the back of your computer"
Is this a serial connection?
Or will you need a foot wide port with 700 or so contacts on it?
I know serial connections are very fast nowadays, but I don't know if you can get the entire memory bandwidth of a cpu without spreading the bandwidth in parallel connections.
So, you take the external interconnects, a large SMP box, and a transfer rate unachievable by anything except channel-bonded Myri/Infiniband/Quadrics, and you've suddenly commoditized (is that a word?) the Origin 2K architecture. Unfortunately, there will be that inevitable gap between "announced" and "benchmarkable", but this should lead to interesting system design.
Computing might just become fun again. Small systems passing information around to form a display wall, or big systems chained together to become huge systems.
the more accurate the calculations became, the more the concepts tended to vanish into thin air. R. S. Mulliken
I can see an interesting situation where you could have a traditional CPU, to which you could plug in additional external processor modules as your needs expand. (assuming the OS could handle sharing out multithreaded apps over a variety of different multi-CPU configurations.)
Dave has a processor intensive project this week? He gets the big stack plugged into his machine until someone else in the office needs it.
Server getting bogged down? Add another couple modules to the system.
I like the idea.
m-
You catch enchiladas by picking them up behind the head and holding them underwater until they don't kick anymore -VeGas
I really can't see it being that kind of socket!
Oh I dunno, take it out to dinner, buy it a few drinks, you never know what could happen.
HT 3.0 increases the bandwidth to 41.6 GB/s, that's 86% more than 2.0. It's also expected to be backwards compatible with current motherboards using 2.0. The new processor will run with 3.0 speeds while the motherboard will be stuck with 2.0. The new Rev. F AMD cpus are expected to have HT 3.0. It should help with multi-processor systems where the high bandwidth connects each cpu.
Whoever subimtted the article doesn't understand what the external HT links are for. They are _NOT_ a replacement for USB or any other similar technology. External HT is used to link multiple chassis together to form a large SMP box. This is similar to infiniband, etc. This is NOT designed to be a way to just plug in a CPU to an external port. Read the pdf:
p df
http://www.hypertransport.org/docs/tech/ht30pres.
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Most of the HyperTransport updates look to be good (and, frankly, about time) but I am highly concerned that if certain manufacturers (such as Broadcom) haven't even bothered to do better than a fragmentary 1.x and have ignored 2.x entirely, there is little hope that they'll do much with 3.x.
And that's the big problem. If AMD are the only ones who ever implement the specification in full, correctly, then it doesn't offer any significant advantage. It isn't universal enough to be useful. That is the killer that has murdered so many excellent technologies. Being good - even being the best - isn't enough. If a rival is more widely adopted, then it'll be the rival that wins. The marketplace doesn't reward quality, it rewards popularity. Quality achieves nothing.
It's a small world and it smells funny; I'd buy another if it wasn't for the money; Take back what I paid (SoM)
Now half my brain will be trying to design a 939 connector USB cable in the background....
hehe external CPU, someone got a better batch of something than i did.....
HT enabled FPGA boasts 300x performance gains in some computations
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OMG Ponies?
But seriously, you got it wrong. It's puke green, of course.
The fact that you were modded flamebait makes me wonder which fool computerfucker got points today.
Slashdot - where whining about luck is the new way to make the world you want.
We'll be able to go from New York to Tokyo in less than three hours?
What?
Why are MacBook Pros so much faster than Powerbooks?
:/
The MacBook Pro sports a 666Mhz DDR FSB, while the Powerbook sports a 133Mhz FSB. It doesn't matter how fast your processor is if you don't have a fast enough way to power it (much like a V-12 will not do well with a single-barrel carb used on a lawnmower engine).
The Von Neumann bottleneck is the significant limiting factor in all machines, once your working set of data exceeds that of your L1/L2 cache. Suddenly your 1.5 Ghz G4 is 266 Mhz
Faster hypertransport means happier users of AMD machines. My AMD64 beats the pants off my Sempron 2500 because its 800Mhz HT bus allows it to do context switches in less than 1/3rd the time of the Sempron!
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Internet Explorer (n): Another bug -- that is, a feature that can't be turned off -- in Windows.
Hey Intel, hows the FSB? And, for that matter, how's that DRM-soaked Viiv product going?
"Sure there's porn and piracy on the Web but there's probably a downside too."
Yup... It has always been thus. The difference is that the high-end processors do exotic things and then Intel/AMD suck it in when it is ready for commoditization. The x86 has *always* been behind in those types of technologies (but usually pretty far ahead in tricks to make the x86 ISA fast) because those technologies are high-end. Eventually, it all trickles down to commoditization and then we get it in x86s.
Just make all the components (memory, CPU, disks, interfaces) like Legos, and you'll be set. Need more RAM? Just add another block. Suzy needs some extra CPU for a big project, let her borrow your block for the day.
The bonus feature would be collecting enough hardware to make the Millenium Falcon out of your PC.
So fifteen years ago everyone else had 20GB/sec buses? Funny, Sun seems to think they were using MBus, which peaked at around 350-400MB/sec. And HP was dropping CPUs on a GSC bus running at ~ 250MB/sec. I'd look up what state of the art was for SGI and IBM, but it would be silly. AMD and Intel surpassed other chip vendors on a number of fronts years ago.
Okay, let me explain about the difference between hardware and software. Processors and HyperTransport, and thus the subject of this discussion, are hardware related. Windows and Unix are software. Blabbering on about how Windows is the scourge of the world and we should all use vi/emacs/insert_editor_here when the parent was clearly talking about hardware with no association other than your own (Extremely weak, see other replys) point seems a bit... oh I don't know. OS Zealous?
How many people can read hex if only you and dead people can read hex?
Perhaps it's because your Sempron 2500 is a socket 754 chip, so cannot use dual-channel memory. The AMD64 has a faster FSB, and it's dual-channel.
Many people (including yourself it seems) misunderstand HT. It isn't the FSB, an Athlon 64 has no FSB. HT is only used to communicate non-memory I/O and to synchronize caches between processors when doing memory I/O. So it's rather unlikely that HT could make your context switches 3X faster. Best thing for that would be a bigger cache, which your AMD64 probably has also.
http://lkml.org/lkml/2005/8/20/95
That's a nice idea and all, but it doesn't make a lot of sense architecturally, at least for general-purpose computing. HT is designed as a peripheral bus. Making a CPU be a peripheral to the main system... well, you could offload work onto it, I suppose, and it would have DMA access, but it would still be the ultimate third wheel---far enough out that memory accesses would be relatively slow, and it couldn't realistically share peripheral access, so all UI interaction and device access would pretty much have to be handled on the main CPU/GPU, so you end up bottlenecked by the main CPU for a lot of stuff anyway.
Um... I hate to break this to you, but AMD-64 CPUs use Hypertransport links as their interconnect already. Which means the way you described it is exactly how it works. The 100-series Opterons have 1 HT link that goes to the system's peripheral devices and buses. The 200-series Opterons have 2 HT links: one connects it to the other CPU and the other connects to peripheral devices. I think you can guess how many links the 400- and 800-series Opterons have.
The place where this would be really interesting, though, would be the whole "one bus to rule them all" space. You could use this to cheaply add external PCI slots without the relatively expensive hardware needed to send PCI more than a couple of inches (though this can also be solved using PCIe as the interconnect). You could use this to eventually supersede low performance busses like USB.
This is how HT is used internally already. It connects the CPU to the other buses and system devices (the other end of the link is usually terminated by the southbridge ASIC. As far as clustering goes, a 1-meter link makes it somewhat doable, but rememeber that there are already high bandwidth external interconnects like Infiniband that are already in use. I didn't see anything in the article that suggested HT is capable of blowing the established technologies out of the water.
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According to the latest ruleset, this post should be modded as Vorpal Flamebait +5.
"The bus connection between my CPU and the RAM is, indeed, the Hypertransport. Northbridge, CPU, and RAM are all connected by it."
This is wrong. Athlon64s have an on-die memory controller. They communicate with memory directly through the dual-DDR memory bus, no intermediaries. This is what gives Athlons their famously low memory latency.
In Athlon64s, the northbridge as we know it does not exist because the memory is connected directly to the CPU itself. The CPU is connected to the chipset by way of a hypertransport bus, and memory I/O for other devices goes over this bus to the CPU's memory controller.
I rarely criticize things I don't care about.
Instead of the harping on the implementation (which was done in a slapdash, amatuerish fashion by SiByte in order to make a quick buck - and screw the customer), you should blast Broadcom for basically dropping support for this CPU. Broadcom has done almost nothing whatsoever to improve the CPU. In fact, they go far out of their way to avoid the needed improvements. Witness the completely bogus (and nearly useless) JTAG support for the 1250.
They used to have GDB support for it for free. That's all gone; and in fact no longer works with the new Rev C 1250's. Instead, you have nearly useless third-party support from Corelis and Greenhills.
Forget source code debugging if you have a ClearCase SCM, unless you want to go through a bit of pain and hackery.
And, hells bells, let's not talk about the memory controller, which is the worst one I've ever seen. If there were ever anything which needed improvement, it is that.
In short, if you chose the BCM1250, you were an idiot and deserve what you got. No sane embedded person would do so. A clueless architect might, but not a real embedded engineer.
I once had to inherit this mess; and I'm delighted to be done with it.
So just avoid Broadcom altogether. They have an established track record of leaving you high and dry should you make the mistake of depending on them. And they just don't give a damn about their customers.
The best way to predict the future is to create it. - Peter Drucker.
guess what
Cray use Hyper Transport now
XML - A clever joke would be here if