Chip Power Breakthrough Reported by Startup

Carl Bialik from WSJ writes "The Wall Street Journal reports that a tiny Silicon Valley firm, Multigig, is proposing a novel way to synchronize the operations of computer chips, addressing power-consumption problems facing the semiconductor industry. From the article: 'John Wood, a British engineer who founded Multigig in 2000, devised an approach that involves sending electrical signals around square loop structures, said Haris Basit, Multigig's chief operating officer. The regular rotation works like the tick of a conventional clock, while most of the electrical power is recycled, he said. The technology can achieve 75% power savings over conventional clocking approaches, the company says.'"

Comments

Re:Radical Breakthrough?

[Mindwarp]

Why not? If this works it sounds like Moore's law would continue, and would give whatever company that deployed it first a performance advantage.

Because first they're going to get a bunch of their theoreticians to work the math on the problem to make sure it's viable. Then they're going to get a bunch of their VLSI modellers to run virtual simulations on the clock modification to refine exactly how great the potential efficiency gain would be. If that turns out OK then they'd produce some simple mock-ups of the new clock architecture to make sure that it functions correctly in hardware. Then they'd go about the expensive and time-consuming process of redesigning the current chip architectures to include the new style clock. Then they'd produce an initial fabrication of the chip to run through extensive hardware testing (and on the inevitable failure they'd hop two steps back and try again.) Once they were happy with the design they'd scale up to full production and roll it out.

Everybody in the microprocessor design world remembers this all too well.

Sounds good but what about size?

[mustafap]

Like with asynchronous processors, maybe its downside will be the silicon area required to implement it.

Other techniques like multiple independant clock areas that can be shut down when not in use seem far more beneficial, IMHO.

vaporware...?

[moochfish]

It just amazes me that a small, never-before-heard-of-company offers a solution to a problem that Intel, IBM, and AMD have been trying to solve for over a decade, each of which have 10 times the budget, expertise, and personel. Did I mention a headstart of a minimum of 10 years of R&D tossed at this problem? I hate to be a pessimistic troll-like poster, but without even a working proof of concept, I can only call this vaporware until they show me a working product. This article says nothing except "we have technology every computer in the world will need in the next ten years... please invest in us and we'll get you a demo soon."

Re:vaporware...?

[Jeremi]

It just amazes me that a small, never-before-heard-of-company offers a solution to a problem that Intel, IBM, and AMD have been trying to solve for over a decade, each of which have 10 times the budget, expertise, and personel.

I'm in no way qualified to comment on the actual technology here, but I will submit that this situation isn't as unlikely as it might seem. For many problems, the potential solution-space is so large (and the cost of trying out various approaches is so significant) that even a large R&D lab with a big budget and years of effort can end up missing what in retrospect is a very clever and useful solution. It's easy to get bogged down trying "just one more tweak" of your first (or second or third) approach that you never look around and notice the other approach hiding in plain sight. Even worse, a given organization can easily build up a culture that says "this is the way we do things, because this is the way we know things work", which can discourage even bright new employees from looking at alternative methods. (i.e. Why "start from scratch" with approach B when your company has invested millions in developing approach A?)

A new startup, on the other hand, doesn't have all that baggage that might limit their point of view. Or even more likely, some bright person may have had The Big Idea, and decided to found a startup to exploit it and get rich, rather than donating his idea to some pre-existing corporation.

That said, there is plenty of room for bullshit vaporware in the world too :^)

Re:Chip technology is awesome

[DigiShaman]

So, would it be possible to make a 3-D chip?

Yes, by stacking multipul dies in one chip. The problem however is thermal. It's hard enough getting one die to cool down. How do you propose flushing the heat of the dies sandwhiched in the middle?

I call BS

[Avian visitor]

I've read the FA and despite having a couple of CMOS designs behind me I don't understand a bit of what they are saying. Either the reporter that wrote this has absolutely no idea what he is writing or this entire 'breaktrough' is just vapourware.

The article seems to say that the 'tick' of the clock is carrying energy throughout the chip and when the 'tick' hits the edge, the energy is lost. Electronics in your typical digital circuit does not work that way. Energy does not flow through the chip with the signals (ok, it does theoretically, but that amount is negliable with the dynamic losses in the gates mentioned below).

You get power dissipation in each gate or buffer that changes state because of some signal, irregardless of the direction in which the information is flowing. You can not recycle this power. This comes directly from the basic principle behind CMOS technology (used by almost all digital chips today) - you are charging and discharging a capacitor.

Typical example, that running signals in a circuit does not save power: take a ring oscillator (a number of negators wired in a loop). This circuit will oscillate (send changing signals through its loop) and consume an considerable amount of power.

Re:I call BS

[imgod2u]

As I'm aware, most high-speed oscillators are LVDS or LVPECL. They don't oscillate between VDD and GND, they generate two 180-degree phase-shifted voltages relative to each other. The problem isn't generating the clock, it's distributing it across the chip. And unless this oscillator scheme has the ability to not be affected by fanout, line delays, etc. it will not overcome the clocking problem. There is still a need for that clock signal to reach different parts of the circuit and there will still be a wire delay, which will cause clock skew. That same clock will still need to drive many gates (or be buffered and then drive those gates). That introduces rise time delays. You'd have to change the gates themselves, not just the clock source, in order to avoid this.

Voltage flowing in loops..

[t35t0r]

What a breakthrough

Re:Radical Breakthrough?

[Anonymous Coward]

None of these "bugs" cause the wrong number to be computed during math operations. The FDIV bug did.

Advertising lingo - "up to"

[Weaselmancer]

Remember, in advertising-speak, "up to" means "less than". Values between 0% and 75% fulfill the conditions of being "up to a 75% savings".