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4x4 Chips, Opening AMD's Architecture
Nom du Keyboard writes "Once upon a time open slots in a PC that anyone could build a card for were a good idea. PCs with them sold better than PCs without them. Now AMD is proposing another new socket that will be open for plugging in of 3rd party co-processors directly on the processor bus." They've also announced a 4x4 chipset, meant to counter Intel's Core 2 Duo chips. From the article: "Socket 4x4 will have a more immediately impact. Set for a release in the latter half of this year, it essentially lets you combine two dual-core Athlon 64 X2 or Athlon 64 FX chips to create a quad-core desktop PC now ... AMD made the point that Socket 4x4 also provides a more flexible upgrade path for a single motherboard system by letting you start with one chip and add another later on. AMD didn't talk pricing, but you can bet neither the Socket 4x4 motherboards, nor systems that use it to include two dual-core CPUs will be cheap."
As a sysadmin, this sounds neat -- but I haven't seen any computing environments that need that kind of horsepower yet. But, I can't wait to crank-up my distributed.net ranking.
At my last contract, we used IBM Bladecenters -- Linux in a dev/QA environment, and they had prolly the largest load-generator farm I've ever seen. It wasn't the CPUs that were maxed, tho -- just the network.
Zhrodague.net - I do projects and stuff too.
I thought the current dual-socket motherboards (eg this board) could already accept dual-core Athlon (well, Opteron) chips (eg: the 270 series) to make a quad-core machine ?
Actually if this isn't the case, I'll be very grateful if someone could tell me, because I was thinking of ordering the above for a replacement webserver...
Simon
Physicists get Hadrons!
4 CPU cores x 4 GPU cores
These systems are designed to handle the dual SLI systems the GFX companies are starting to push.
Even though every uber-gamer is gonna need a 4x4 for bragging rights and IPE(Imaginary Penis Enlargement), it won't be that much of an upgrade for hardcore gaming until more games break out of the single-threaded event loop. Multiple processors only work on multiple threads.
I hear rumors that people use processing power for other things, but I think those are just myths. (Actually I just started to work for a high-performance computing group and they'll probably be excited by the new AMD offerings)
If this signature is witty enough, maybe somebody will like me.
I am not a business major, but I was an AMD stock holder from when it was trading at $7.55 to $40.
AMD has been jacking up their prices which we have assumed is simply a response to their higher quality and increased market share but it has done something interesting. AMD is now selling the majority of high end desktop and workstation cpus but they have low marketshare in high end servers and low end desktops.
It would be easy to claim that these are new strategies implemented by Ruiz their new CEO however they would imply a more stock holder less comsumer driven business and AMD's poor marketing (low marketing budget?) and the $100 laptop project seem to rule out this possibility.
If we look back over the history of AMD it becomes interesting to look at chips like the Athlon MP which went through severe price reductions immediately prior to the release of the Opteron.
Implementing dual cpu chipsets on the desktop is likely a strategie implemented imediately before moving their low end to dual core and their high end to a new cpu architecture.
Amd will likely try to match Intel's price and consumer points, low end desktop (with dual core if my predictions about their consumer centric and engineering company bias are correct), high end desktop (catering to the SLI crowd and consolodating on the likely long term presence of socket AM2 (or subsequent sockets, AMD's 754 for an example of a short term socket), workstation (likely with the same socket but with quad core cpus), low end server (Opteron or replacement) and some kind of new high end chip.
The prediction about a new high end chip is based on reduced gap between the current opteron line and the 4x4 system layout.
All of this is very predictive, but based on my studies of AMD's engineering, ethics, and sales history.
It seems unlikely that AMD would try to get into the coprocessor market. Unless they find an extremely compelling coprocessor idea, they'll make more money using their wafer starts for more Athlon, Opteron, Sempron, and Turion processors than they would by devoting some of those wafer starts to coprocessors.
The example of a security coprocessor is questionable at best. The only advantage to plugging a coprocessor into a processor socket rather than a bus slot (e.g., PCI Express) is when that coprocessor can take useful advantage of much higher bus bandwidth than is available from the slot. Except in the largest servers, a security coprocessor does not need that much bandwidth.
A physics coprocessor might be able to put that much bandwidth to use; I'm not sure. I think it's more likely that physics coprocessing will be added into the next generation of video cards.
Current systems for AMD use a point-to-point HT link from each CPU to RAM/SouthBridge.
This is good as each processor gets dedicated bandwidth which leads to great performance(see Intel's ass-whooping in 4P+ systems for real-world example).
This isn't the case; each CPU has one or two channels of DDR (or DDR2) interfacing with a memory controller on-die. Local RAM is not accessed via Hypertransport. Remote RAM is accessed over a ccHT link, but that's not the same as the non-coherent HT links which are used to connect peripheral buses.
So, what this 1x1 or 2x2 or 4x4 mechanism(and I believe 4x4 is the max it will scale to due to HT addressing limits without external control chips) will allow AMD to do is have 2 cpu's per set of traces to RAM/SB effectively halving the bandwidth that each CPU gets. This would be *really bad* if they were using standard DDR as both those CPU's would be severly starved. But, the fact that AMD has just moved to DDR2, which has a lot more bandwidth than one CPU can consume, should result in a significant net-gain in performance.
I doubt that this is the case. You could conceivably hang a RAM controller off HT in a single processor environment (when the first K8s came out, there was talk of using this as an expansion pathway, although it does awful things to your latency), but if you were to connect some kind of RAM controller to two CPUs at once, how would you do cache coherency? From what I'm reading of this '4x4' stuff, it's most likely that the recent (AM2 and onwards) x2s and FXs ship with a second, cache coherent, HT link enabled (rendering them functionally identical to an Opteron 2xx without the requirement for registered DRAMs.)
You're doing it wrong.