Quad Core Battle, Intel Yorkfield vs AMD Altair

Joe writes "Yorkfield Extreme Edition based on the 45nm Penry core architecture will meet heads-on with AMD Altair based on the 65nm K8L core in Q3 2007 as reported by VR-Zone. Due to its advanced 45nm process technology, Yorkfield XE is able to pack a total of 12MB L2 cache (2 x 6MB L2) and still achieving a much smaller die size and higher clock speed of 3.43-3.73Ghz. Yorkfield will feature Penryn New Instructions (PNI) or more officially known as SSE4 with 50 more new instructions. Yorkfield XE will pair up nicely with the Bearlake-X chipset supporting DDR3 1333, PCI Express 2.0 and ICH9x coming in the Q3 '07 timeframe as well."

Comments

Re:what new instructions?

[Anonymous Coward]

Here are details about the new instructions.

RISC is dead. I miss it too.

Re:Isn't that going a bit far?

[Wdomburg]

That's because Intel is cheating. They don't have a quad-core die, they have two dual core dies shoved onto a multi-chip package. Each die has a shared 6MB cache.

Re:One sided

[Wdomburg]

The specifications list bandwidth for the 1.0, 2.0, and 3.0 specs as 6.4, 11.2, and now 20.8GB/s respectively. AMD is jumping from 1.0 to 3.0. They're actually pushing a bit more than the original spec on the current processors though, since the spec originally only included bus speeds of up to 800MHz and they've got it running at 1000MHz which bumps throughput to 8.0GB/s. So, assuming they max bus speed, it'll be about two and a half times faster.

This is where I think AMD gets themselves a big win. Intel's FSB, even clocked at 1333MHz (actually it's 333MHz QDR, but we'll not quibble) pushes only 10.6GB/s. And that's not accounting for the off-die memory controller. Even with dual buses (like the 5000 series chipsets tout) they only just barely have enough aggregate throughput to handle memory transfers.