AMD Reveals Plans to Move Beyond the Core Race

J. Dzhugashvili writes "The Tech Report has caught wind of AMD's plans for processors over the coming years. Intel may be counting on cramming 'tens to hundreds' of cores in future CPUs, but AMD thinks the core race is just a repeat of the megahertz race that took place a few years ago. Instead, AMD is counting on Accelerated Processing Units, chips that mix and match general-purpose CPU cores with dedicated application processors for graphics and other tasks. In the meantime, AMD is cooking up some new desktop and mobile processors that it hopes will give Intel a run for its money."

Comments

hyper transport

[Joe The Dragon]

Intel would be better off if they where to start useing hyper transport Even having two cores on same die with linked by hyper transport to each other with one link to the chip set is better then 2 cores shearing the FSB.

What is the point of having 32 cores with only one link to the chip

Even with the new Xeon's there still only one link per cpu and the cpus need to use it to get to ram

Amd chips right now have up to 3 newer ones will have up to 5 links

Re:hyper transport

[aquaepulse]

This is supposed to be the plan for Intel. Why would they use an existing standard?

Re:hyper transport

[mrand]

In general, lower voltage (presumably due to smaller geometry gates) does result in lower dynamic power in CMOS technologies:

Pd = f*C*(V)^2 [Power= Frequency x Capacitance x Voltage squared]

The problem with smaller geometry is that, starting in the 65nm to 90nm area, static power dissipation (heat independent of operation frequency, such as leakage current across a transistor) can start to rise noticeably. The question is if that leakage starts becoming a significant fraction of the overall power dissipation. In processors running at GHz, I'm guessing not. In FPGA's, it can be.

      Marc

Amiga?

[vjl]

That sounds like the Amiga's way of doing things...over 20 years ago! I'm glad it's catching on, and I'm glad AMD is doing it; AMD usually gets things right, and makes their products a lot more affordable than Intel...

/vjl/

Re:Dedicated processors for "other" tasks

[Anonymous Coward]

Don't forget crypto, the hardware AES on a 1GHz VIA C3 runs circles around a A64 X2 4800+ doing the same in software, at something like 10 vs. 80W power consumption.

Re:Hybrid Graphics & the Cell roadmap.

[Watson Ladd]

They wouldn't need to work on compilers, and developers wouldn't need to rewrite code if they encouraged people to use BLAS and then optimize BLAS. I think that a lot of this multi-core stuff will end up being matrix and vector math units with some kind of MIMD based on GPU style masking branches. If they wrap it in a special-purpose API, they only end up hurting their benchmark scores.

Transputer

[temojen]

Compaq used to sell those; they're called transputers and came as a PCI card with 4 FPGAs, some RAM, and a PowerPC CPU.

Re:Integrated graphics..

[jcasper]

XtremeData (http://www.xtremedatainc.com/) has a board with a FPGA that plugs into an Opteron 940 socket. Not exactly what you asked for, but a step in that direction.

Re:Free Enterprise

[Crouching Turbo]

It's called POSIX, and everyone supports it except Windows.

Re:Same old.

[Martin Blank]

To be fair, the Merom architecture is a true dual-core architecture. The "quad-core" chip that Intel announced recently is simply glued together, and AMD's recent split design isn't terribly much better (though the two cores are linked by a dedicated datalink). AMD has a true quad-core design being prepped for next year, and Intel may have to follow suit, especially if AMD is able to show a decisive performance edge.

Simply false

[DMiax]

Windows supports POSIX: look here.

In any case you have a point in that Microsoft does not really encourages programming for POSIX-compliant OSs, but just for Windows.

Re:np-hard optimization board

[hritcu]

Mainly max-clique and graph coloring

Solving SAT in hardware would be enough, since you can reduce most NP-complete relatively easily to it, the SAT-solving algorithms are already highly optimized, and there were even previous attempts to build special purpose hardware for solving SAT.

Transputer? Don't think so.

[dabadab]

The transputer was an invention of Inmos and they were interconnected little CPUs designed for parallelizable task. Transputers had an own language, Occam where for every block you had to specify if its instructions were to be executed in serial or parallel manner.
It was a rather fascinating system (especially for its time) but it has died on the market.
(Sorry for the off-topic ranting, but I programmed these during my studies and quite liked the concept)

Re:Same old.

[Sloppy]

Heh. Yeah, "cheat" or not, they delivered a product that works. It's inelegant when you look at it, but winning with inelegance is practically Intel's historical identity. Look at 8086 vs 68000. ;-)

And copying that, is how AMD managed to threaten Intel in the first place. The very idea of "extending" x86 to x86-64 is disgusting, but there were plenty of 64-bit architectures out there, and guess which one finally managed to unseat the 386.