Slashdot Mirror
Could HP Beat Moore's Law?
John H. Doe writes "A number type of nano-scale architecture developed in the research labs of Hewlett-Packard could beat Moore's Law and advance the progress of of microprocessor development three generations in one hit. The new architecture uses a design technique that will enable chip makers to pack eight times as many transistors as is currently possible on a standard 45nm field programmable gate array (FPGA) chip.""
Hi, I work as field apps for a large FPGA manufacturer. The interconnect lengths count for a large proportion of the delay between each configurable logic cell (LE in our terminology), so a shortening in interconnect is not only useful from a transistor count view, but also an upper performance limit view. As for the first poster the larget current FPGA's (Altera's StratixIII, Xilinx Virtex 5 series) have multiple millions (sorry can't be bothered to look up the exact figures) of transistors. However, the flexibility of an FPGA is not that it can just be configured like a Microprocessor (though it can, see Altera's NIOSII) but to act like almost any digital logic you wish to conceive of. Want a FFT function? Don't write it in C/C++, describe it in hardware - much much faster than code, and getting on for an order of magnitude or more faster than on current DSP chips. To do the this, the simplest architecture element is a Logic Element (in Altera technology at least) - this usually (but not always, different vendors have their own twist on these) consists of a 4 input look up table and an associated programmable logic register. Combining a number of these LE's through the routing can create sequential or purely combinatorial logic functions. On top of this many hardware vedors also include special blocks for on chip RAM or ROM, and commonly now DSP multipliers. Of coures, RAM/ROM and muolts can theoratically also be built from discrete LE's but this can be inefficient so dedicated blocks are used. The latest Altera StratixIII family uses ALM (Arithmetic Logic Units) which are slightly larger than an LE but allow more functions to be implemented in one ALM than an LE, potentially reducing the number of logic levels to privide any given funtion, and in turn this can increase system througput and therefore performance. The current larget FPGA announce is the StratixIII EP3S340, which contains 340K equivalent LE's or if you prefer 340K programmable registers (for simplicity). You should ignore exact gate count comparisons between vendors as these are usually marketing figures. Some will include the gates used to configure the FPGA as well as usable ones accessible for use as general logic funtions, so can skew the figures somewhat.
FPGAs are not microcontrollers. They are programmable logic devices. You can use an FPGA to implement a microcontroller, a microprocessor, or any other logic device.
You probably wouldn't be able to put the latest Xeon processor on an FPGA, but to say that they are far slower and smaller than modern processors is incaccurate. There are plenty of FPGAs that can handle signals in excess of 1GHz, and a 22,000 transistor FPGA is a VERY small FPGA.
Many custom chips including custom processors are first developed and tested on FPGAs before they become ASICs. In fact, you can give your FPGA design files to an IBM or a TI, and they'll gladly turn it into an ASIC for you -- for a fee. Often times, FPGAs are used in designs without ever going to an ASIC. Generally, the only reason you build an ASIC is because the per chip cost is much cheaper. Heat and performance are usually secondary considderations. There is, however, a big up front cost to doing an ASIC, so for low volume parts or designs that might need to be upgraded or fixed later, FPGAs are generally the better option.
There's also a middle ground -- so called "hard copy" FPGAs. This is when you give your design files to Xilinx or Altera with a big check, and they sell you special FPGAs that are guaranteed to work with your design (but not necessarily other designs). In exchange, you get the chips a lot cheaper and they can also disable parts of the chip your design doesn't use to reduce power consumption. The FPGA manufacturers benefit by being able to sell chips that would otherwise be defective but are suitable for certain designs.