AMD Says Barcelona Will Outperform Clovertown

Dysfnctnl85 points out a ZDNet Blog posting in which AMD claims that its upcoming quad-core "Barcelona" chipset should be 40% faster than "Clovertown," Intel's quad-core Xeon 5300 line. AMD says that the introduction of Barcelona marks a shift in their strategy from emphasizing price to performance. The post goes on: "Intel is eager to claw back some of the server market share from AMD, and this is where Clovertown comes in... The Xeon 5300 line will represent excellent value for money since Intel plans on pricing them the same as its dual core Xeon 5100 processors. That could make things tough for AMD."

Comments

If only I/O speeds could also grow as fast

[namityadav]

The way AMD and Intel are improving the processor speed is very impressive. I/O speed is going to become an even clearer bottleneck now.

Re:If only I/O speeds could also grow as fast

[slamb]

You could turn it around and say that, since the disks are not using their full bandwidth, the disks spend most of their time waiting for requests.

Only by specious reasoning. I'll disprove by counterexample. If I continously tell the disk to seek to one extreme and read a cacheful, then seek to the other extreme and read a cacheful, it will neither be waiting for requests nor using its full bandwidth. A and not B disproves (A => B).

Latency and throughput are unrelated only if there can be infinitely many requests produced and satisfied in parallel. In the case of a hard disk, there can be only one active request per head because it can only be at one place at once. Let's consider the example of my laptop hard drive. It's rated at a data transfer rate of 150 MB/s. But look at the seek speeds - 1.5ms minimum, 12ms average read, 22 ms maximum. It can read a 1 MB file in 6.7 ms, but if that 1 MB file is fragmented into ten chunks across the drive, it'll take around 130 ms.[*] So in this case it actually transfers at 5% of its rated speed. And depending on the application, the data may be in many, many tiny chunks.

That being said, disk latency is one of the major causes of poor performance. But "bottlenecks" only have to do with throughput.

Latency limits throughput. The requestee usually can only satisfy a limited number of requests at once (see above), and the requestor may not be able to produce the next request until it's received the previous response.

Simple example: I'm performing a binary search. I need to see what's at location mid before I know if I'll next be interested in location (low+mid)/2 or location (mid+high)/2. In some cases, I can do a speculative fetch for both locations, but you can only extend that out so many generations before you've used up most of your bandwidth on data you'll never use.

Processors are smart about re-ordering instructions to keep working while they're waiting for stuff to happen, but still they frequently get to a point where they can't execute anything more because of ordering constraints - the results of some instruction are dependent on a previous instruction that hasn't completed yet because it's waiting for a value from memory. That value can be the actual instruction to be executed or an operand...either way, your shiny new processor's stuck doing nothing.

[*] - It might beat the average if it's smart about ordering. At the very least, 22 ms has to get added if one request is at one extreme and one request is at the other extreme. That brings it down to 23% of the rated speed.

upcoming chipset?

[aczisny]

FTFS:

"Barcelona" chipset should be 40% faster than "Clovertown,"

You'd think since the blog got right that Barcelona is the upcoming processor from AMD, and since Clovertown is a processor codename from Intel, that the summary could have gotten it right too. Do submitters not read the articles either anymore?

The bounty of true competition

[j. andrew rogers]

Whether AMD or Intel is producing the fastest, cheapest, most scalable, or most efficient processor at the moment is not terribly important.

What *is* important is that when you have two companies in genuine fierce competition at the bleeding edge of technology and performance, they extract an impressive amount of productivity and effort out of their engineering and science assets. Free markets are at their best when all the major players have a healthy fear of the capabilities of their competitors.

Re:So.. the writer expects Intel to sit still?

[Joe The Dragon]

Intel still has the FSB and that will get the way of the making the chips faster and add more IO.
Havening 2 dual-cores linked by a fsb bus will get in the way even faster as the speed of the cpu gets higher.
And a 4 cpu quad-core sever will likely choke up at the chipset to ram link as well as the chipset to chipset link.

Also intels dael quad-core workstation and the V8 only haves has the pci-e lanes for 1 x16 slot and the 8 other ones are used for the chipset to chipset link amd based ones will blow it away even more so with KL8 cpus. Right now an 2 cpu amd board has 4 pci-e x16 slots running at x16 x8 x16 x8 with 2 x4 lanes left over + each cpu can have a HTX slot or other HT based chip hook up to it.

Re:Don't believe this

[be-fan]

All Intel has to do is turn up the clock the day before Barcelona ships. We already know that the Core 2 Duo chips are very overclockable, and getting another 40% -- or even 50%+ out of them -- shouldn't be a problem.

The performance a chip can get with overclocking is way higher than what the manufacturer can deliver in final products. They have to be highly reliable at their specified clockspeed with (relatively) poor cooling, and while meeting the given voltage and thermal dissipation specifications. I've seen the Core 2 over-clock to 3.5 GHz (with conventional cooling) online, but how many of those are doing it at the stock Vcore while staying within the 65 watt TDP?

Re:Don't believe this

[TheThiefMaster]

We are talking a SERVER line of cpus here. EE chips are a desktop cpu brand.

For servers TDP is incredibly important, because server rooms are air-conditioned, a room full of higher TDP cpus costs much much much more to run from an electricity point of view.

That's not to say that they won't overstep their vcore or TDP limits to get the upper hand on performance, but that wouldn't win them the performance/watt ratio crown that's the all-important stat for server cpus.

Re:You mean if they made OSX for all PC's?

[that this is not und]

but not on the scale that an officially sanctioned PC-version of OSX would be.

Officially sanctioned on what tiny subset of the PC hardware that's out there? Apple could never support the huge x86 hardware base out there, in fact a big part of their quality success comes from them having tight control on both the hardware and software aspects of their platform.

Also they could never handle the tech support calls. "Why doesn't my ISA-bus hand-scanner from Windows 3.1 work on OSX?"

Re:Don't believe this

[be-fan]

The TDP and voltage levels are part of the platform specification. Intel can't just up them without requiring motherboards, cooling units, etc, to be upgraded to handle the new spec. They might get away with it for some consumer level stuff, but not in the server market where Clovertown and Barcelona are competing. The server folks are going to want some substantial lead-time to rejigger everything to meet higher TDP and Vcore specs.

Re:Don't believe this

[that this is not und]

Expect them to step outside them the moment competitive advantage requires it.

That would be, eight or twelve years ago. Or is it next year? Or do the facts show that they know they'd be creamed, and the PR disaster would make the Pentium floating point bug look like a company picnic?

Personally, I think they know more about what they're doing than some overclockers. Have you ever read an Intel datasheet? Have you ever read ANY IC datasheet?

Re:You mean if they made OSX for all PC's?

[timeOday]

Why doesn't Apple do this?

Because then OSX would be just as troublesome as Windows and Linux. Apple's limited hardware support is a big part of why everything "just works."

Re:Mainly in FP

[Erich]

New instructions (LZCNT, POPCNT, EXTRQ/INSERTQ, MOVNTSD/MOVNTSS)

Interesting!

I can't find much information on it, but I'm guessing "LZCNT" is count-leading-zeros. This is like "find-first-one" from the other direction. It's very useful for things like finding the magnitude of an unsigned numbers. It's used quite often on architectures without FPUs (like ARM) in floating point routines for renormalization. I guess it could also be useful if you are having to do floating point emulation for numbers with enourmous precision.

I guess if you have "BSR" then LZCNT = -BSR

POPCNT is probably population count, the number of 1s in a value.

Both LZCNT and POPCNT are instructions that are a pain to do in software if you lack the instruction in the hardware, and they are relatively cheap (especially if you have BSF/BSR already).

I'm still a bit suprised that there aren't a few more of these bit-banging instructions in x86, like bit interleave/deinterleave and bit reverse. Modern processors are doing enough signal processing work that one would think you'd thow the tools in the bucket, as cheap as they are. I guess lookup tables are good enough.

What's the over/under for which SSE revision will add a galois field multiplier? 7? 8?

But seriously, the dual ported caches are probably the best improvement for most people. You can't be too rich, too thin, or have too much memory bandwitdth.

It looks like AMD has done the same thing Intel did with "Core 2"... just take a good architecture and keep making improvements... more issue width, more memory bandwidth, more flexibility in scheduling. Every bit counts.

I think we're getting to a similar point in modern CPU microarchitectures to where we are in some other industries, where drastic improvements are much more rare and it all comes down to really great implementation... like making engines. There are some innovative ideas for engines, and certainly a lot of people experiment, but really the best designs are just really well balanced and tuned. (although more cylinders is usually a good thing for horsepower).

Re:AMD is not and never has been a serious CPU

[RzUpAnmsCwrds]

The day you can remove the fan and heatsink from a running AMD CPU and it will simply carry on running throttled down until the fan and heatsink are replaced, they will be ready for "professional" use.

This just isn't true, nor is it really relavent. Intel CPUs do throttle if you have - say - a fan failure, but the throttling is not enough to keep the CPU stable without a heatsink.

I have pulled the heatsink from an old Northwood, and, let me say this - the results are not pretty. The system crashed almost immediately.

The Tom's Hardware tests you are probably referring to were pretty clearly faked.

And, more to the point, when was the last time that you saw heatsink fell of of a system while it was operating? Fan failures, yes. Heatsinks falling off - not unless the box is dropkicked.

The AMD was slightly unstable

Was it? Tell that to the people who have been running Opterons successfully for years in server environments. Tell that to Dell, to HP, to Sun, to IBM, or to the millions of people who use AMD CPUs every day.

One of the reasons AMD were cheaper, bang for buck, is they left out all the extra stuff Intel did not, like on chip thermal management so it didn't catch fire when the heatsink / fan failed.

AMD CPUs have had on-die thermal management since Athlon 64, and chipset-implemented thermal management since the Athlon XP.

Intel's thermal montior (TM1) feature has been the source of hell for lots of users. It's a good idea, poorly implemented - instead of halting the system or producing an error, the system continues to run - poorly. It makes it difficult to diagnose whether or not the heatsink is working properly, unless you use tools which detect throttling, which, unfortunately, aren't bult in to Windows.