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Intel Set To Demo PRAM

xavatarx writes "Intel's chief technology officer Justin Rattner is set to give the first public demonstration of the company's PRAM (phase-change RAM) technology at this week's Intel Developer Forum conference. 'Intel and other companies are counting on PRAM to replace both NOR and NAND flash memory to generate the demand required to produce the new memory chips in volume, and drive down costs,' the article says."

10 of 83 comments (clear)

  1. Re:PRAM is new? by holle2 · · Score: 5, Informative

    Well:

    Apple PRAM == Parameter RAM
    Intel PRAM == Phase-change RAM

    While:
    Parameter RAM == Any kind of conventional (probably non volatile) RAM
    Phase-change RAM == New kind of non volatile RAM using a new phase change technology

    Thus:
    Apple PRAM != Phase-change RAM

    QUED.

  2. Re:PRAM is new? by carpe_noctem · · Score: 2, Informative

    Not to nitpick your post, but I thought you'd like to know that it's QED, not QUED... it's short for "quod erat demonstrandum", from Latin. :)

    --
    "Quoting famous computer scientists out of context is the root of all evil (or at least most of it) in programming." - K
  3. Re:Question on how PRAM works and is manufactured by Hal_Porter · · Score: 5, Informative

    I found this paper.

    http://www.ovonyx.com/tech_html.html

    It sounds like the chalcogenide is deposited as a thin film. Mind you they talk about transistors, so it must be an extra processing stage on a normal chip.

    This seems to confirm it
    http://www.eetimes.com/in_focus/silicon_engineerin g/OEG20030919S0044
    Chalcogenide RAM is nonvolatile, boasts access speed comparable to that of DRAM and possesses advantages in scalability, high sensing margin, low energy consumption and endurance to cycling. The structure and processing of chalcogenide memory are much simpler than in other next-generation memories such as MRAM and ferroelectric RAM. In a chalcogenide memory cell, the data is stored in a flat chalcogenide layer that can be deposited near the end of the CMOS interconnect process. Therefore, disturbance of the CMOS process is minimal, making it ideal for systems-on-chip.

    So I guess they add an extra step to the end of the process and deposit a layer of chalcogenide glass.

    These things sound really cool BTW, they're writable at a byte granularity in tens of nanoseconds just like a regular SDRAM, but they are non volatile. It looks like they can flip bits individually either way too.

    Whereas flash memory is much slower - tens of microseconds per byte, and you need to erase 16K-128Kbyte block at a time. And PRAM is supposed to be denser and allow unlimited erase cycles.

    Plus Intel is backing it so it's not like it will fail because the vendor can't afford to scale the production process to make chips with a high capacity.

    --
    echo -e 'global _start\n _start:\n mov eax, 2\n int 80h\n jmp _start' > a.asm; nasm a.asm -f elf; ld a.o -o a;
  4. Clarification by Xiroth · · Score: 4, Informative

    Just to clarify (I'm an insta-buff on the subject from the wikipedia article), despite having RAM in its name this is more a storage solution than a memory solution.

    I'm generally more a software person than hardware, but there's a lot to be excited about with this. It's apparently got a r/w time only 2-3 times the time of DRAM, and holds a lot of potential for things like paging files and storing frequently used software since there doesn't seem to be a limitation on the number of writes that can be applied. Once things develop, the technology might even be a ludicrous-speed replacement for hard-drives, as the storage mechanism is quite stable (more so than flash). I can definitely see this taking off in the future, if it delivers what it promises (and nothing else supercedes it in the meantime).

  5. Re:Again? by SnowZero · · Score: 4, Informative

    Well it looks like PRAM is already winning on the practicality front. Two companies have PRAM chips at 128Mb or larger, and claim good density numbers. MRAM has only reached ~16Mb last I knew (although smaller ones can be bought right now). FeRAM, at least from Wikipedia, seems to suffer from density problems, as it can only be built on 350nm generation fabs (i.e. very old).

    The only thing not mentioned is cost, but if it scales (Intel thinks it does), and the special glass just adds only one step to manufacturing (which the original developer claims), it doesn't look like there are too many roadblocks to success. Now, claiming it will replace DRAM may be a little premature, however there's a good hope they can replace flash at least.

  6. Power consumption info by RepCentral · · Score: 2, Informative

    Power consumption specs for programming PRAM are not stated in many places but
    I was able to find a reference here:
    http://www.hitachi.com/New/cnews/051213.html

    And for comparison to flash memory, here is the 512Mb 1.8v part from ST Micro:
    http://www.st.com/stonline/products/literature/ds/ 10058/nand512r3a.pdf

    The specs do not line up exactly.
    PRAM: 100uA at 1.5V for programming each bit cell
    FLASH: 8ma at 1.8V for programing one page (256 bytes), internally rebuffered in SRAM

  7. Re:Question on how PRAM works and is manufactured by Khyber · · Score: 4, Informative

    It's not unlimited in writing. It's got an expected life of 10^8 writes/reads. I've been watching this for years, now, and I'm surprised nobody even bothered to check some of my previous posts that mentioned this technology beforehand. I'm already using an Ovonix-made test drive in this machine - Windows loads up within 4 seconds. On my 5400 RPM 80 gig HDD, it takes about 14 seconds. VAST improvement, and yet another breaking of the bottleneck in hard drives. I couldn't be happier.

    --
    Still waiting on Serviscope_minor to wake up to fucking reality and realize that Jessica Price isn't going to fuck him.
  8. Re:Again? by Khyber · · Score: 3, Informative

    You're not replacing DRAM with this stuff. DRAM is meant for far more read/write cycles than what this can do. This is a replacement for storage, not random access memory, due to the limited 10^8 read-write cycles (which any idling computer would eat up just running processes within a few days, or could go thru just running one game given sufficient complexity) As an upside, I'm playing with a test drive made by Ovonyx right now - Things load so fast you'd think "When did Windows become so damned efficient and speedy?" Four second boot time? Oh hell yes!

    --
    Still waiting on Serviscope_minor to wake up to fucking reality and realize that Jessica Price isn't going to fuck him.
  9. Re:Question on how PRAM works and is manufactured by Mystic+Pixel · · Score: 2, Informative

    The structure of the silicon wafer is, in certain respects, similar to glass. The main difference is that "glass" (in the everyday sense) is an amorphous solid -- the atoms are basically jumbled together -- whereas the atoms in wafer silicon form a regular crystal lattice. The upshot of this is that, with a little cleverness, it's easy to deposit a wide variety of different substances in a layer on top of an exposed wafer surface, and have them stick fairly well. And, depending on the characteristics of said substance, selectively removing it (via chemical etching or a more advanced process) isn't difficult, either. There are a number of technical concerns that must be addressed in order to integrate this into an existing fabrication process, but it's far from impossible (in fact, it's not even too difficult, it's just kind of expensive. But production volume makes up for that.)

  10. Re:Question on how PRAM works and is manufactured by Hal_Porter · · Score: 2, Informative

    Read the paper

    http://www.st.com/stonline/products/literature/an/ 10122.pdf

    and this one

    http://newslab.csie.ntu.edu.tw/~johnson/public_fil es/R-FLO436_Chang.pdf

    Because I wouldn't mind getting a flash drive. I'm just a bit skeptical.

    Well it wouldn't surprise me if some flash disks get this disasterously wrong to be honest. Some of the lifetimes on page 6 of the Chang paper look a bit low for comfort - around 4 years for NFTL.

    --
    echo -e 'global _start\n _start:\n mov eax, 2\n int 80h\n jmp _start' > a.asm; nasm a.asm -f elf; ld a.o -o a;