IBM's Snowflake Microchips

Phantom of the Opera writes "The BBC reports that using self-assembled polymers and copying natural patterns, IBM hopes to have microchips that are 30% faster and consume 15% less energy. The secret? Adding a little nothing in all the right places."

Comments

OK Software geeks . . .

[moeinvt]

Now I am the Master!(EE)

I'll default to a "wait & see" perspective, but this has a firm basis in device physics.

One of the major speed limiting factors in microelectronics is capacitive loading. With the tiny scale of contemporary semiconductors "wire capacitance" has become the dominant delay factor. Since the wires are so close together, adjacent wires produce a parasitic capacitance effect(extra load on the circuits) similar to this.

http://en.wikipedia.org/wiki/Parallel_plate_capaci tor

(The article on parasitic cap didn't say much)

As you can see, this capacitance varies directly with the size of the wires, is inversely proportional to the distance between them(shrinking all the time with new process technologies), and directly proportional to the "dielectric constant" of the material between them.

Air has a dielectric constant of ~1.00. Silicon Dioxide, the typical insulator in semiconductors is ~3.9.

http://en.wikipedia.org/wiki/Low-k

Other glass-like materials have been experimented with, but I haven't read about many successes.

So, essentially if you could "leave out" the SiO2 insulating material, you could reduce the parasitic capacitance of the wires by a factor of 3.9. Nothing to scoff at if you can actually pull it off.