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Inside AMD's Phenom Architecture
An anonymous reader writes "InformationWeek has uncovered some documentation which provides some details amid today's hype for AMD's announcement of its upcoming Phenom quad-core (previously code-named Agena). AMD's 10h architecture will be used in both the desktop Phenom and the Barcelona (Opteron) quads. The architecture supports wider floating-point units, can fully retire three long instructions per cycle, and has virtual machine optimizations. While the design is solid, Intel will still be first to market with 45nm quads (the first AMD's will be 65nm). Do you think this architecture will help AMD regain the lead in its multicore battle with Intel?"
When it comes to multi-processing scalability, AMD's Barcelone/10h/Phenm single-die four core with hypertransport inter-chip interconnects will do far better than the two-die four core shared-bus Intel chips. Also, both the old and new AMD architecture will do relatively better on 64-bit code than the Intel Core 2 architecture: Intel's micro-op fusion does not work work in 64-bit, and their 64-bit extensions are a relatively recent add on to the old Core architecture. The FPU power of the new 10h architecture will be excellent as well. On the other hand, Intel chips will remain very competitive on integer code, cache-happy benchmarks, particularly when run in 32-bit mode. Also, the SSE4 extensions of the upcoming 45nm Intel ships will help for encoding/decoding and some rendering applications, provided that the software has been properly optimized to take advantage of them.