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Intel Shows Off 80-core Processor

Posted by Zonk on from the next-up-a-skillion-core-system dept.

thejakebrain writes "Intel has built its 80-core processor as part of a research project, but don't expect it on your desktop any time soon. The company's CTO, Justin Rattner, held a demonstration of the chip for a group of reports last week. Intel will be presenting a paper on the project at the International Solid State Circuits Conference in San Francisco this week. 'The chip is capable of producing 1 trillion floating-point operations per second, known as a teraflop. That's a level of performance that required 2,500 square feet of large computers a decade ago. Intel first disclosed it had built a prototype 80-core processor during last fall's Intel Developer Forum, when CEO Paul Otellini promised to deliver the chip within five years.'" Update: 06/01 14:37 GMT by Z : This article is about four months old. We discussed this briefly last year, but search didn't show that we discussed in February.

3 of 222 comments (clear)

  1. It may be known as "a teraflop", but... by 91degrees · · Score: 5, Informative

    It's known incorrectly.

    The measurement is "FLOPS". Floating Point Operations Per Second. It's an acronym. The 'S' is part of the acronym. Hence even if you only have oneof them, it's still a FLOPS. And it's capitalised.

    Strictly speaking it should be "trillion FLOPS" as well since it's not an SI unit but my pedantry is limitted.

  2. Re:core 2 duo has a higher transistor density? by imsabbel · · Score: 3, Informative

    Core2 has 2 or 4 Mbyte l2 cache. 1 bit cache is 6 transitors == more than 200 of those 291 million transistors are high-density cache. (Density of cache is a lot higher than that of logic, which the 80 core cpu nearly solely is made of).

    (Btw, i fucking HATE the "millimeters squared" expression. Its square millimeter. 275 mm squared would be more than 65 cm^2.)

    --
    HI O WISE PRINCE. WHT TOOK U SO DAM LONG?
  3. It's possible... by mbessey · · Score: 3, Informative

    I thought that was a little weird, too. But the 80-core chip could simply have more wires (and therefore, fewer transistors). Given that they mention that there are routing elements between the cores, it's possible that a lot of the chip's real estate is taken up by massive busses between adjacent cores.

    Another explanation might be that they didn't want to waste the time/expense to come up with an optimized layout, or that they intentionally spaced things out to make testing easier.