AMD Multi-Core G3MX DRAM Interface Details Emerge

Posted by ScuttleMonkey on Wednesday August 22, 2007 @08:55AM from the new-toys-all-the-time dept.

MojoKid writes "New details have emerged regarding AMD's upcoming G3MX technology. The 'future Opteron Platform' AMD mentioned in their press release seems to be built around a CPU currently codenamed 'Hydra'. Hydra will still feature an on-die memory controller, but unlike current platforms it will be geared for DDR3 memory. The processor will interface to one or more G3MX chips, which in turn provides the interface to the memory slots. G3MX will act as a memory port extender for the memory controller in the CPU socket and a serial link to the RAM.The electrical signaling between the memory controller and G3MX is based on HyperTransport 3.0."

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So a mini north bridge chip? by Brit_in_the_USA · 2007-08-22 09:05 · Score: 4, Insightful

Looks like a mini northbridge - just memory and no PCIe or AGP or anything else.

I wonder what the latency hit is going to be with lots of them on a server and moving data from one branch of a tree to another?
BR> I guess if they don't deviate from HT3 spec too much lots of other applications could emerge for this chip, with the inclusion of partnerships to bring DSP's and other accelerators / CPU alternatives to the server line this is turning more and more into Lego.