AMD Releases Register Specs For R5xx And R6xx

ianare writes "AMD has recently released register specifications for the ATI Radeon R5xx and R6xx graphic devices. This will (theoretically) allow the OSS community to develop drivers, given time. In fact, engineers from Novell have released a first alpha quality Open Source driver which currently supports initial mode settings. Although current work is focused on 2D, rather than 3D acceleration, this type of information sharing could conceivably lead to an OSS 3D driver."

Comments

Old files?

[caluml]

These files are 12 days old. Aren't these the same files that were released sometime last week?

Novell's engineer started earlier

[renoX]

Note that the reason why Novell's engineer were able to deliver an alpha driver this week is because they had access to the ATI's specification under NDA since two month.

So the driver isn't the result of only one week of work, even if it's still in an alpha state.

Re:These documents are not as exciting as you thin

[AntiDragon]

If I remember correctly, AMD have stated that there is more to come - the specs and documentation covering the 3D functions has been promised for the "near future". The reason for the delay is due to patents and third party code in those areas and have had to take greater care to make sure the specs and docs aren't encumbered. I hope they follow through on this.

Absolutley _Spot On_

[burnttoy]

I develop drivers for a living (actually for the last year I haven't). I went through the docs a few weeks ago - I spent about 2 hours having a "good" read.

These docs will let one do the following

1 - Setup you own video mode
2 - Setup up a video overlay (not video acceleration)
3 - Setup a full colour mouse cursor

That's all. These do not explain how to blit, alpha blend, scale, ROP2, ROP3 or ROP4 or perform any other transform.

This is useful, but not _that_ useful!

Hopefully there will be more to come specifically more on the memory/cache controller (essential to get performance up), more on the PCI/AGP bus control, more on the 2D source/dest blit registers, pitch, loop counters and I'd like to know how much of the 2D guts is programmable. TBH I thought we'd have moved on to the point of (somewhat) programmable shaders for 2D these days with loops etc built into the HW (0 clock loops and addressing etc).