Sun Niagara 2 CPU Now Open Source

downix writes "Late last night Sun Microsystems announced the immediate availability of the UltraSPARC T2, also known as the Niagara 2 CPU. While we all might not have a silicon fab in the basement, the access to this source code reaffirms Sun's commitment to open source, and in addition gives us FPGA-lovers something new to play with. The source code can be downloaded (with registration) from OpenSPARC.net. Already the previously open sourced T1 has spawned spin-off projects, such as the Simple RISC S1."

Comments

Re:Home fabbing

[tlhIngan]

http://en.wikipedia.org/wiki/Fab_(semiconductors) Wiki says over 1 billion, probably close, given the relative rarity of them even amongst commercial companies.

A billion is low-end fabs. High end cutting edge or even near-cutting edge technology costs much more. Maybe a billion for "old-school" tech like 130nm.

No, your best bet is to just pay the few million to have someone fab it for you - there are very few companies that have their own fabs and can do it inhouse (e.g., Intel, IBM, AMD, Freescale (Motorola), Samsung, Toshiba), at least, cutting edge fabs. Low end fabs can be had for cheap (1um and larger), which is great if you don't particularly care about density (e.g., Gemplus - those smartcards have HUGE silicon for 32k memory and not much more).

Most companies are fabless. They contract out the fab work to places like TSMC (amongst others - they're all well known). These include even heavyweight giants like nVidia, Altera, Xilinx and such. The only real downside is that delays can happen if machinery breaks down, or everyone submits a fab order simultaneously that causes backups at the fab and thus delays shipments. The turnaround time (from tapeout to getting chips back) can be 3 months or more. Luckily, most people test their designs out on FPGAs first to work out their bugs before committing them to silicon. Even places like Intel use computer simulation, discrete circuits, FPGAs, and such before they fab it out to their own fabs just because of the turnaround time.

Of course, what I want to know is what's the smallest FPGA one can put this on and still have something workable. (Where things like bus timings and memory clocks still in the realm of "practical" and "in spec").