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New VIA x86 CPU Takes Aim At Intel Silverthorne
Kaz writes "While not operating on the same scale as the two major CPU designers, VIA has been gaining traction in the world of UMPCs and thin clients with its Eden and C7 lines of processors. While past architectures have been considerably out-of-date in terms of modern features, the new Isaiah architecture looks to be very competitive with what AMD and Intel have lined up for future ultra-mobile products. It features an out-of-order, superscalar execution core, 64-bit support, virtualization, and even SSE3 — all on a 94M-transistor, 65nm process die. The initial offering will be single-core only, though VIA says that multi-core ability is already designed in. Is Isaiah going to replace your Core 2 system for gaming? No, but it might give Intel's Silverthorne a run for the money."
The next big step in integration is integrated memory. Cache memories are consuming most of the die in your typical high-performance CPU, these days. If you can find a CMOS-compatible, high-density (e.g. - SRAM's six transistors per cell is toooo big) memory technology, then we're going to be at the point where we can simply replace the cache memory with on-board memory. If said on-chip memory technology is nonvolatile, then we're talking panacea cakes, batman.
Naturally, this will first occur in low-performance devices where huge amounts of memory are not necessary. Then, it will work its way into the PC and up from there.
This is why Intel is divesting itself of discrete memory technologies - they don't want to be holding the bag when they're obsoleted by on-chip memory.
SPU manufacturers had better be ready for this because discrete CPUs will be going the way of the horse and buggy if anyone can ever do such a thing.
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You, and whoever last moderated the grand parent's post, aren't getting what he's saying.
What he means is: forget on-chip cache -- on-chip main memory. IOW, instead of having main memory on the motherboard, it would be embedded into your processor, running, presumable, at the same speed as the CPU.
If you follow the trends happening in CPUs, including this one, faster CPUs aren't the big issue. The real issue is the bus. The bus is slow. The more you put on the other side of it, the better. A CPU like this new VIA CPU might be slow, but if you had sufficient memory integrated right on the CPU die, it would blow the pants off your latest 4+GHz Core 2 Duo.
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The curious thing is that the Isaiah is heading towards OoO, whereas Intel's going to build the first in-order chip since the Pentium in Silverthorn.
C7 already has a good track-record for small form factor, low power, and providing acceptable performance at that category. IMO with the OoO they're heading more towards the laptop market, and I think they could've done something at least less conventional with the design.
Imagine that they modified the C7-M in-order execution core to a 4-way, fine grain interleaved multithreading, and have 2 cores. The existing C7-M has a short pipe, so pipeflushes aren't as penalizing. At the clockspeed that they're starting at (2GHz), each thread would have acceptable performance for your typical workload. And as OSes are becoming more thread happy (OSX is definitely one of them), such design would be at least something different than ordinary. It would be like having a cut down Sun Niagara in your laptop.
The current design would make it work decently well for low end laptop and desktops, but I can't help but think that the core now has a bunch of stuff that they can't exactly turn off - I haven't heard of a CPU that could switch off its OoO and retire queue, and the die size has increased significantly compared to the C7.