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Intel Doubles Capacity of Likely Flash Successor
Intel has announced a new technique that allows them to effectively double the storage capacity of a single phase-change memory cell without adding cost to the current fabrication process. "Phase-change memory differs from other solid-state memory technologies such as flash and random-access memory because it doesn't use electrons to store data. Instead, it relies on the material's own arrangement of atoms, known as its physical state. Previously, phase-change memory was designed to take advantage of only two states: one in which atoms are loosely organized (amorphous), and another where they are rigidly structured (crystalline). But in a paper presented at the International Solid State Circuits Conference in San Francisco, researchers illustrated that there are two more distinct states that fall between amorphous and crystalline, and that these states can be used to store data."
I just read an article about them passing the two billion transistor mark for a single chip. The BBC announcement mentions many of these transistors are used for memory (the caches I assume). I am not a hardware expert although I wonder if this new phase-change memory is what they are using. Highly unlikely since this seems to be brand new research. If not, I certainly look forward to them integrating this into their chips and dies for use in caching--they could be blowing Moore's Conjecture out of the water! Exciting stuff for hardware nuts!
My work here is dung.
"Intel Doubles Capacity of Likely Flash Successor" this from a site that had a huge Intel logo on it for how many months?
It's neat tech, but as long as flash keeps getting bigger and cheaper we won't see it's 'Successor' for a while.
Ask not what you can do for your country. Ask what your country did to you
Is it really only doubling the capacity. Let's say you have a piece of memory that can hold 2 bits. Now, if you are using binary storage, and each bit stores 1 of 2 values, then you have the possibilities of: 00,01,10,11. Which is 4 different values. Now if you have 4 states for each bit (which I guess wouldn't, by definition, be a bit anymore), then you have 00,01,02,03,10,11,12,13,20,21,22,23,30,31,32,33. So, you have have squared the amount of information you can store. Unless I'm completely misunderstanding what they are doing here.
Anthropic principle: We see the universe the way it is because if it were different we would not be here to see it.
Will we now have computers that do base 4 arithemetic rather than base 2? At leat the memory of them? Or is this exactly what the INtell engineers are saying?
Could this new technology be used for CPUs as well, or only memory?
mcgrew's razor: Never attribute to stupidity that which can be explained by greedy self-interest
Even when a technology becomes shippable it tends to take quite a while for it to catch on. It is easy to make small lab batches, but reliable low-cost high-volume production takes a lot longer. NAND flash was invented in 1988 but only really got going in around 2003 - 15 years later.
Engineering is the art of compromise.
More PR about potential of this technology, but no product released.
They promised a chip last year - where is it ?
Something smells bad...
The new memory is described as being as fast in reads as DRAM, which is an order or two of magnitude slower than register memory, which is what you need in a processor. Intel's adding of so much memory into the CPU interests me far more. Add enough, and the main memory is IN the processor (a-la the Transputer). From there, a little reorganizing reverses the arrangement - from memory in a CPU to a process in memory (PIM) architecture. Special-purpose PIM has been done before - Cray embedded a communications library in RAM before - but a full processor would be much more interesting.
It's a small world and it smells funny; I'd buy another if it wasn't for the money; Take back what I paid (SoM)
The article says that Intel has just doubled the size of PRAM, which is nice, but PRAM will not be commercially viable for some time to come, so I the article, or at least the headline is somewhat sensational. I guess science journalists are still journalists.
When I am working on a design, I guess i could say that I increased the capability by an infinite amount at the moment when the first prototype is verified functional.
The principle is similar to MLC flash (multi-level cell NAND flash), that also stores 2 bits per data element by using 4 different voltages. The tech behind this memory is completely different though.
If they found only one middle state, they could implement { true, false, file_not_found } enum
Extreme Programming - Redundant Array of Inexpensive Developers
Why was the grandparent post modded -1 Redundant? Seems like he/she was pretty stupid about the topic although you point out it is interesting to think about putting main memory sized dies on chips.
Is this what Slashdot has come to?
Captcha: neighbor
N/T
Does this mean twice as many stories at Slashdot?
One bit of material can be switched b/w four states. Thus Base 4 logic is possible. However, the article indicated that each cell will be used for 2 bits. In this arrangement capacity is only doubled.
It's soon to be more likely than you think.
http://en.wikipedia.org/wiki/Mobile_Suit_Gundam_SEED
I'm still waiting for giant robots.
On the very low hardware level, yes, the memory will be base 4. However, on anything but that very low level there's no reason for anything to care - it's trivial to convert between base 2 and 4, and it's a lot easier and more sensible to program a computer that works in base 2 than to make your opcodes do something sensible on 4-state things.
I am trolling
Storing the information in physical states of atoms, while it may lead to a practice increase in storage, means the theoretical limit of storage/volume is alot smaller. So unless we want to go one step forward and two steps backwards this looks like a major mistake as an area to do research in!
IranAir Flight 655 never forget!
You are counting the number of VALUES that could be stored, not the equivalent number of bits needed to store those values. With your logic, starting with 8 slots that store 2 states, going to 8 slots that store 4 states, we'd be going from 256 to 65536. But that's not 256 times the capacity of bit storage; it's still just a doubling of the capacity. For every slot that can store 4 states, that's just the equivalent of 2 bits. That's certainly twice as much as before, and it means this technology of memory can come in twice the capacity for about the same fabrication costs (and you know a corporation will take as much of that as profit as the market can handle). Still, it's a better thing to have if these states are reliable (there is a risk that the new states may not be as reliable under adverse conditions like voltage error, thermal stress, and radiation, as the original two states).
now we need to go OSS in diesel cars
You can label the now total of 4 states however you like, such as 00/01/10/11 or 0/1/2/3 or A/B/C/D or T/A/C/O. But whatever they are, Intel would need to, at some point, convert this all back to 2 bits with states 0/1 when interfacing with external binary circuits. If they don't know how to do that they are welcome to "Ask Slashdot".
now we need to go OSS in diesel cars
Oh look, another innovation that we will probably never see. I love new ideas - but instead of reporting on possible uses of technology science, how about actual science- stuff you will see this in 2 months reports. The "LOOK - SUPERBATTERIES WITH CARBON NANOTUBES - CHARGE IN SECONDS - 5 BAZILLION HOURS USE" kinds of articles are interesting, but not are they slashdotworthy. In Seinfeld's world, it definitely would not be sponge worthy.
Management is doing things right; leadership is doing the right things. - Peter F. Drucker
Welcome our new bulging fore-headed overlords! Oh, you meant the other kind of memory...
Shall we call them 'amorlline' and 'crystphous'?
Phase Change Memory (PCM)'s a different animal entirely - much faster, with much different physical and chemical design, and it's also had technology advances recently.
Bill Stewart
New Fast-Compression-only CPR http://preview.tinyurl.com/dy575ks
...the reliable low-cost high-production facilities already exist, as the process deviates very little from the CMOS manufacturing process. It's the same material that is used in rewritable optical media, and on top of that, it's basically just glass. Where you once needed stable unchanging silicon for memory/data storage, now we're just using different states of glass. Most of your concerns are addressed in this technology, and this is why I'm watching it very closely. Go read up a bit here. (PDF WARNING)
Oh, it also does have the theoretical capability to replace SRAM and DRAM. But in order for it to do that, it would need to be a little faster and we would have to be able to fully exploit all four states that it can be in for data. Also, read/write cycles would need a few more orders of growth to be used as a processor cache or extended RAM replacement, but as it is they're great for hard disk usage.
Still waiting on Serviscope_minor to wake up to fucking reality and realize that Jessica Price isn't going to fuck him.
Each item that could store two bits can now store twice as many bits of data. Before you had one item that had two states: (0, 1) Now you have one item that has four states (0, 1, 2, 3). With two states, you would need two items to make four possibilities: (00, 01, 10, 11). So you get the same amount of information with 1/2 the number of storage items, hence double the capacity. Using your example, you would need four bits to store the same possiblities as two items with four states: (0000, 0001, 0010, 0011, 0100, 0101, 0110, 0111, 1000, 1001, 1010, 1011, 1100, 1101, 1110, 1111).
So now we're actually gonna see storage capacity measured in "gigaquads"?