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Intel Doubles Capacity of Likely Flash Successor
Intel has announced a new technique that allows them to effectively double the storage capacity of a single phase-change memory cell without adding cost to the current fabrication process. "Phase-change memory differs from other solid-state memory technologies such as flash and random-access memory because it doesn't use electrons to store data. Instead, it relies on the material's own arrangement of atoms, known as its physical state. Previously, phase-change memory was designed to take advantage of only two states: one in which atoms are loosely organized (amorphous), and another where they are rigidly structured (crystalline). But in a paper presented at the International Solid State Circuits Conference in San Francisco, researchers illustrated that there are two more distinct states that fall between amorphous and crystalline, and that these states can be used to store data."
I just read an article about them passing the two billion transistor mark for a single chip. The BBC announcement mentions many of these transistors are used for memory (the caches I assume). I am not a hardware expert although I wonder if this new phase-change memory is what they are using. Highly unlikely since this seems to be brand new research. If not, I certainly look forward to them integrating this into their chips and dies for use in caching--they could be blowing Moore's Conjecture out of the water! Exciting stuff for hardware nuts!
My work here is dung.
"Intel Doubles Capacity of Likely Flash Successor" this from a site that had a huge Intel logo on it for how many months?
It's neat tech, but as long as flash keeps getting bigger and cheaper we won't see it's 'Successor' for a while.
Ask not what you can do for your country. Ask what your country did to you
Will we now have computers that do base 4 arithemetic rather than base 2? At leat the memory of them? Or is this exactly what the INtell engineers are saying?
Could this new technology be used for CPUs as well, or only memory?
mcgrew's razor: Never attribute to stupidity that which can be explained by greedy self-interest
It's double the number of bits. If you look at the largest value a 16 bit number or a 32 bit number can store, its not "double" in size. When it comes down to it, they're just bits, how you use them is up to you.
Maybe the four states are not independent, so we're moving from "two" states to "four" storage states. 2 to 4 is a doubling. That is implied by the phrasing that these two new states lie between the other states.
Currently the phase change RAM can only store 1 bit per element, in two possible states -- 0 or 1. They are changing this four possible states, which corresponds to two bits -- 00, 01, 10, 11. Hence, the amount of data that can be stored is doubled. The number of bits held per element increases by one every time the number of possible states is doubled.
Sigs are too short to say anything truly profound so read the above post instead.
Even when a technology becomes shippable it tends to take quite a while for it to catch on. It is easy to make small lab batches, but reliable low-cost high-volume production takes a lot longer. NAND flash was invented in 1988 but only really got going in around 2003 - 15 years later.
Engineering is the art of compromise.
No, its still only double. Instead of thinking of bits, just think of memory cells. Each cell can store two values under the original method. The new method allows for four values. So, with two values you get 0 or 1, => 1 bit. With four values you get 0, 1, 2, 3, => 00, 01, 10, 11 => 2 bits. So, two bits for every one bit previously is just a doubling.
The new memory is described as being as fast in reads as DRAM, which is an order or two of magnitude slower than register memory, which is what you need in a processor. Intel's adding of so much memory into the CPU interests me far more. Add enough, and the main memory is IN the processor (a-la the Transputer). From there, a little reorganizing reverses the arrangement - from memory in a CPU to a process in memory (PIM) architecture. Special-purpose PIM has been done before - Cray embedded a communications library in RAM before - but a full processor would be much more interesting.
It's a small world and it smells funny; I'd buy another if it wasn't for the money; Take back what I paid (SoM)
The article says that Intel has just doubled the size of PRAM, which is nice, but PRAM will not be commercially viable for some time to come, so I the article, or at least the headline is somewhat sensational. I guess science journalists are still journalists.
When I am working on a design, I guess i could say that I increased the capability by an infinite amount at the moment when the first prototype is verified functional.
The principle is similar to MLC flash (multi-level cell NAND flash), that also stores 2 bits per data element by using 4 different voltages. The tech behind this memory is completely different though.
If they found only one middle state, they could implement { true, false, file_not_found } enum
Extreme Programming - Redundant Array of Inexpensive Developers
N/T
Another way of looking at it:
Say we use a bit to store the result of a coin toss. True for heads, false for tails.
With two bits, we can store the results of two coin tosses. There are four possible outcomes when two coins are tossed, ranging from neither of them being heads, to only the first or the second being heads, or both of them being heads.
If we double the number of bits, we can store the result of four coin tosses. There are now sixteen possible outcomes, but we're still only storing the result of four tosses.
(Note that this example assumes we're interested in storing off the result of each coin toss. If we're only interested in counting the total number of heads or tails and don't care which coin was tossed in what order, then we can use our bits to store the total number of successful tosses rather the result of each toss, which is a much more efficient use of our bits but carries less information.)
Dan.
Does this mean twice as many stories at Slashdot?
One bit of material can be switched b/w four states. Thus Base 4 logic is possible. However, the article indicated that each cell will be used for 2 bits. In this arrangement capacity is only doubled.
This has nothing to do with bits of memory, but rather cells of memory. Each cell of memory has four states and the four states are mutually exclusive. It can only be in one state at a time. Therefore rather than holding only a 0 or 1 as it previously did, it can now hold 0,1,2 or 3. Hence, double the capacity of before.
I am Jack's complete lack of surprise.
On the very low hardware level, yes, the memory will be base 4. However, on anything but that very low level there's no reason for anything to care - it's trivial to convert between base 2 and 4, and it's a lot easier and more sensible to program a computer that works in base 2 than to make your opcodes do something sensible on 4-state things.
I am trolling
Storing the information in physical states of atoms, while it may lead to a practice increase in storage, means the theoretical limit of storage/volume is alot smaller. So unless we want to go one step forward and two steps backwards this looks like a major mistake as an area to do research in!
IranAir Flight 655 never forget!
You are counting the number of VALUES that could be stored, not the equivalent number of bits needed to store those values. With your logic, starting with 8 slots that store 2 states, going to 8 slots that store 4 states, we'd be going from 256 to 65536. But that's not 256 times the capacity of bit storage; it's still just a doubling of the capacity. For every slot that can store 4 states, that's just the equivalent of 2 bits. That's certainly twice as much as before, and it means this technology of memory can come in twice the capacity for about the same fabrication costs (and you know a corporation will take as much of that as profit as the market can handle). Still, it's a better thing to have if these states are reliable (there is a risk that the new states may not be as reliable under adverse conditions like voltage error, thermal stress, and radiation, as the original two states).
now we need to go OSS in diesel cars
You can label the now total of 4 states however you like, such as 00/01/10/11 or 0/1/2/3 or A/B/C/D or T/A/C/O. But whatever they are, Intel would need to, at some point, convert this all back to 2 bits with states 0/1 when interfacing with external binary circuits. If they don't know how to do that they are welcome to "Ask Slashdot".
now we need to go OSS in diesel cars
Oh look, another innovation that we will probably never see. I love new ideas - but instead of reporting on possible uses of technology science, how about actual science- stuff you will see this in 2 months reports. The "LOOK - SUPERBATTERIES WITH CARBON NANOTUBES - CHARGE IN SECONDS - 5 BAZILLION HOURS USE" kinds of articles are interesting, but not are they slashdotworthy. In Seinfeld's world, it definitely would not be sponge worthy.
Management is doing things right; leadership is doing the right things. - Peter F. Drucker
No! They are in fact doubling the number of bits. A bit is a BInary digIT. '0'=1 bit '00'=2 bits.
To be more precise, what they're doing is changing bits to qits (possibly pronounced 'kits'?), or Quaternary DigITs. There are the same number or qits as there used to be bits.
Either way you look at it, however, you're doubling the data density, and therefore doubling the maximum storage capacity in a theoretical standard-sized hard drive without changing the price point.
Welcome our new bulging fore-headed overlords! Oh, you meant the other kind of memory...
Shall we call them 'amorlline' and 'crystphous'?
I agree, so we are in base 4. So there is double the exponential growth rate, so using this type of memory we can store not twice the amount of data, but rather the square of the amount of data.
So while it's not an exponential growth, it's not linear either (twice the amount). Linear would look like 2*2^n. What we have is 4^n, or (2*2)^n, which is the same as (2^(n*2)), which is the same as (n^2)^2.
So it's actually a polynomial increase in overall storage, not just a linear doubling. This squaring is the effect of 4 / 2 (base 4 to base 2). In order to square the amount of data again, we would need 8 new states (base 8 from base 4), which is a byproduct of this being only a polynomial increase of exponential space.
I think I recall reading that a three-state system is best because it's the closest possible number to e (2.718), which was mathematically proven to be the most efficient state to process.
Since there is no known way to represent e physically due to its fraction, "3" is as good as it gets.
I suggest you read Slashdot
No, it's twice the amount of data. If you can store 1 bit, you have:
0, 1
Two bits:
00, 01, 10, 11
In order to double it again, we simply add another bit:
000, 001, 010, 011, 100, 101, 110, 111
Each binary digit doubles the data capacity. Just like each decimal digit results in 10x the capacity.
For any given number of bits per cell, n, we have 2^n combinations. This technology added one more bit, so it increased the amount of data storage by:
2^(n+1) / 2^n = 2
It only "doubled" because we started with n = 1. There's nothing inherent about how many more physical states are available that would suggest we have to be able to find them in orders of 2. The next breakthrough will most likely just add another state, i.e. another bit.
Phase Change Memory (PCM)'s a different animal entirely - much faster, with much different physical and chemical design, and it's also had technology advances recently.
Bill Stewart
New Fast-Compression-only CPR http://preview.tinyurl.com/dy575ks
That's not what he said: he specifically said that it's "not 'double' in size". 32 bits *is* double the *number of bits* of 16 bits.
...the future crusty old bastards are already drinking the Kool-Aid.
...the reliable low-cost high-production facilities already exist, as the process deviates very little from the CMOS manufacturing process. It's the same material that is used in rewritable optical media, and on top of that, it's basically just glass. Where you once needed stable unchanging silicon for memory/data storage, now we're just using different states of glass. Most of your concerns are addressed in this technology, and this is why I'm watching it very closely. Go read up a bit here. (PDF WARNING)
Oh, it also does have the theoretical capability to replace SRAM and DRAM. But in order for it to do that, it would need to be a little faster and we would have to be able to fully exploit all four states that it can be in for data. Also, read/write cycles would need a few more orders of growth to be used as a processor cache or extended RAM replacement, but as it is they're great for hard disk usage.
Still waiting on Serviscope_minor to wake up to fucking reality and realize that Jessica Price isn't going to fuck him.
I think what the GP meant was that you have more bits per symbol (or memory cell), then you would double the capacity.
A similar thing is why the Baud rate isn't equal to the bit rate on 56.7K modems.
If I have nothing to hide, don't search me
But a bit is a contracion of binary digit, and binary means two. In communications, you have the same distinction between bits per second and baudrate. Bits per seconds give you the amount of ones and zeros transmitted, while the baudrate gives you the amount of symbols per digit. If a symbol can be one of four possible tones (or phases), you get 2 bits per baud, and that's what happening here again.
"It's too bad that stupidity isn't painful." - Anton LaVey
"It's too bad that stupidity isn't painful." - Anton LaVey
Unless the blurb is incorrect i read that there were 2 extra states that were discovered. Once we get more than 2 states per "unit" we stop counting in binary, ones and zeros are purely a representation of "on" and "off" (and typically cited in theory since it's the smallest positive integer exponentiation).
.5v current as low, if one could reliable generate and observe signals of .5, 2, 3.5, and 5, then we would be able to compute in base 4.
If they can represent 4 different states in the same physical component then each bit becomes a 0, 1, 2, or 3. So we will count up as 0, 1, 2, 3, 10=4, 11=5, 12=6, 13=7, 20=8, 21=9, 23=10, 23=11, 30=12, 31=13, 32=14, 33:15, 100, 101, 102, 103, 110, 111, 112, 113, 120, 121, 122, 123, etc.. as we see 2 bits can
Similar to how we represent roughly a 5v current as high, and a
If it requires the technology more space (or time) to switch between the space then the gains will be diminished or even counterproductive but from a purely discrete theory perspective with no performance analysis and extra state changes the alphabet, and the resulting language gets more done with shorter strings (finite length members of the source alphabet).
Each item that could store two bits can now store twice as many bits of data. Before you had one item that had two states: (0, 1) Now you have one item that has four states (0, 1, 2, 3). With two states, you would need two items to make four possibilities: (00, 01, 10, 11). So you get the same amount of information with 1/2 the number of storage items, hence double the capacity. Using your example, you would need four bits to store the same possiblities as two items with four states: (0000, 0001, 0010, 0011, 0100, 0101, 0110, 0111, 1000, 1001, 1010, 1011, 1100, 1101, 1110, 1111).
So now we're actually gonna see storage capacity measured in "gigaquads"?