Melting Microchip Defects May Extend Moore's Law
schliz lets us know about research out of Princeton on melting away defects on microchips using a laser. The new technique, termed Self-Perfection by Liquefaction (SPEL), was published in the May 4 issue of Nature Nanotechnology. Researchers have traditionally approached chip defects by trying to improve the microchip fabrication process, but this eventually reaches fundamental physical limits to do with random behavior of electrons and photons. By focussing on fixing defects, the new method enables more precise shaping of microchip components, and engineers expect to dramatically improve chip quality without increasing fabrication cost. The before-and-after images are remarkable. Here's a diagram of how the process works.
here... http://www.princeton.edu/pr/pictures/a-f/chou/Chou_micrographs.jpg
I'm a materials scientist, so hopefully I can explain this quickly for you all :)
:)
The images that are given (before and after) are some scanning electron microscope images. Think optical microscope except with electrons. Anyway, there is a serious improvement in the structure - the edges are a lot cleaner and more defined. This is a really simple and beautiful way of letting Nature do the hard work for us. What this is doing is liquifing the material and letting surface tension pull it into the lowest-energy configuration (least amount of surface area locally).
It's really a neat way of doing it, because fabrication is really tough - uses either chemical etching or some method of particle bombardment to remove atoms. There's a big trend in matsci to build down, and build up, at the same time at the nanoscale. Think of this as the "error-correction" process after fabrication.
--This is not the same as annealing - annealing is a solid-state process, putting energy into the material to enable atoms to move and remove stress and other small defects from the material.
Hope that helps
One of the major problems with getting linewidth (and thus line separation) down in the photoresist process is the problem of dielectric breakdown. Charge builds up at the irregular surface and if two points on different conductng lines are near one another they will arc across and the chip will be useless (same reason arc lamp electrodes are shaped as needles). This process seems to remove the irregularities, which should allow chip fab units to lay down pathways closer together. Note even the square spots get round(liquids form spheres to reduce surface area) which reduces the tendency for breakdown to occur. If nothing else could allow for the use of lower dielectric packaging, and make things cheaper.
Really cool.