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Intel Unveils 6-Core Xeon 7400
JagsLive recommends CNet coverage that begins "Intel officially unveiled its six-core 'Dunnington' Xeon 7400 processor Monday ... As expected, Intel launched the Dunnington chip for high-end servers ... The Xeon 7400 is also one of the first Intel chips to have a monolithic design. In other words, all six cores will be on one piece of silicon. To date, for any processor having more than two cores, Intel has put two separate pieces of silicon ... inside one chip package."
I'm betting new Mac Pros will be launched today.
"There's an odd catch, however, that will affect the highest of high-end configurations. "Because Microsoft Windows operating system support is limited to a 64-core environment, within a single OS instance, we'll support up to 64 cores," said Colin Lacey, a Unisys marketing vice president."
Gads, who on earth would run a 64-core Windows box? Unless they want to virtualize out multiple servers on one bit of hardware. Most of the "heavy lifting" I've seen on servers with mucho processor cores are running some flavor of Unix. I'm kinda surprised this hasn't been fixed already given the momentum of multi-core processors.
Cheers,
Is it just me, or does 6 seem like a counter intuitive number of cores ?
Remember they need to put other stuff on the silicon too. The XBox 360's CPU uses three quarters of the die for three processors and puts the shared cache etc. in the fourth quarter. Six + support circuitry probably fits a square die better than eight + support.
No, it just matters that you have more than one.
Of course their die surface is 8 times bigger too.
6 = 8 - 2 broken cores ?
You joke but that's already the case with PS3's Cell (7 SPU = 8 - 1 broken), with tripple core Phenom (3 = 4 - 1 broken), and with a very high number of graphic cards (The range segment {pro/mid/low-cost} on which a GPU is used = the number of functional cores they managed to salvage)
A separate reason may be the number of {quickpath/hypertransport/etc.} interconnects (6 cores require 15 interconnect to communicate, 8 cores require 28 interconnects). 6 to 8 cores isn't such a big increase but keeps the number of inter connect reasonnable.
(Other processors types like Tilera end up only interconnecting adjacing cores on their 64x chips and you have a strongly *Non*-Uniform Architecture, with not all core able to reach and talk to others at the same speed)
"Sufficiently advanced satire is indistinguishable from reality." - [Tips: 1DrYakQDKCQ6y52z6QbnkxHXAocMZJE61o ]
That has nothing to do with symmetric multiprocessing. SMP means that all the chips can make memory accesses to all the memory at the same speed. It is the opposite of Non-Uniform Memory Access, or NUMA, in which certain processors (some or all of them) take longer to talk to certain parts of main memory than others or systems in which processors have a faster path to some private off-chip memory in addition to the main shared memory.
That's no different from the 486SXes, many of which were 486DX parts with the defective math coprocessor diked out. It's not very different from how the clock rate on every mainstream chip is determined by how many chips turn out to be stable at which speeds.
In the article it's pretty clear this is a legacy-at-launch part to be a last upgrade for people using the current FSB technology. Other products will use QuickPath, but this is for those who want to keep their current motherboards for one more generation of processors.