Prototype Motherboard Clusters Self-Coordinating Modules

An anonymous reader writes "A group of hardware hackers has created a motherboard prototype that uses separate modules, each of which has its own processor, memory and storage. Each square cell in this design serves as a mini-motherboard and network node; the cells can allocate power and decide to accept or reject incoming transmissions and programs independently. Together, they form a networked cluster with significantly greater power than the individual modules. The design, called the Illuminato X Machina, is vastly different from the separate processor, memory and storage components that govern computers today."

Comments

Transputers, anyone?

[PaulBu]

Am I too old to remember them? And before that, there was Connection Machine...

Also (yes, I clicked on TFA! :) ), planar (in graph theory terms) interconnect topology would seem a bit too simplistic for anything resembling efficient routing...

Paul B.

Re:Transputers, anyone?

[Brietech]

The connection machine was still SIMD, even though it did have 64k (1-bit!) processors. This is just like the transputer architecture though! There are a couple of *really* big problems with this: 1) none of their microcontrollers are individually capable of running a large modern program. They have a few kilobytes of code, and no large backing RAM. 2) How do you get to I/O devices? If you need shared access to devices, this just makes all the problems of a normal computer enormously worse. 3) What about communication latency (and bandwidth) between nodes? They're using serial communications between 72 MHz processors. We're probably talking several microseconds of latency, minimum, and low-bandwidth (just not enough pins, and not nearly fast enough links) communication between nodes. As fun as something like this would be to build and play around with, there are reasons architectures like the transputer died out. The penalty for going 'off-chip' is so large (and orders of magnitude larger nowadays than it was back then), and the links between chips suck so much, that a distributed architecture like this just can't compete with a screaming fast 3 GHz single-node (especially multi-core).

Re:Transputers, anyone?

[Brietech]

Well, if you take that idea to the limit using modern technologies, you basically wind up with rockin' new Nehalem processors using Quickpath Interconnect (QPI) between them, with PCI Express (serial links) to peripherals. But that's huge, is incredibly power hungry, and is basically the opposite of this architecture. But let's think this over some more. To access L1 cache, you can do it in a single cycle. L2 might be 10-20 cycles, etc. Now going over PCIe, the fastest thing going besides QPI, has a latency of like 400-800 nS. Even on a lowly 1 GHz processor, that's like 800 clock cycles, so you might as well be watching grass grow while you try to do something that's not embarrasingly parallel. As soon as you pump up the clock rate more, and add large caches and DRAM and all that, then you have *huge* power problems, and you still have somewhat crappy performance. Large-scale multi-core basically *does* use this architecture, only it's all on one die. It also uses an interconnect that doesn't suck, and manages to be cache coherent, so you can actually use it. Each core has it's own cache though (which is larger than the RAM on these chips), and the clock is nearly 2 orders of magnitude higher. Like i said, this is fun for a microcontroller project, but the performance would be atrocious for anything except embarrasingly parallel problems (and even then it would suck using these microcontrollers).

Re:Transputers, anyone?

[dha]

I'm part of the project that produced this board.

I am definitely, yes, old enough to remember the Transputer. And I hacked artificial life models on the MasPar in the early 90's, which had an architecture in some ways similar to the Connection Machine.

Although the IXM is indeed 'embarrassingly suitable' for assembly into planar grids, it certainly isn't restricted to that. With right angle headers, for example, it's easy to make shapes likes rings and cubes and so forth.

When the global computational geometry of a machine is fixed at design time, before the ultimate task is known, routing can easily become a major problem. And general routing is hard. Maybe too hard.

But part of exploring modular systems in the 'physical computation' space is trying to figure out ways to make the geometry of the particular computer you build better fit the behavior you're implementing, which can help ease the general purpose routing problem.

And if one really gets into a corner, well, ribbon cable is cheap.

Re:Transputers, anyone?

[RoccamOccam]

Exactly. I have a 256-processor system down in my basement, that I built in 1988-89. Composed of Size 1 (9.3 cm x 2.7 cm) TRAMs (TRAnsputer Modules), each node had a 25 MHz T805 and 4 MB RAM. Each transputer had four 20 Mbit/s bidirectional serial links. Starting with a single processor connected to the host PC, a downloaded program would follow the defined link topology to boot and program each processor in turn.

Hardware-wise, it looks like the system described in the article really only trumps the transputer by virtue of the reconfigurable power sub-system. The transputer was a fantastic bit of engineering.

Re:So?

[Fyre2012]

perhaps just replace old modules with new ones, following ye olde Moore's law cycle?

Wow

[$RANDOMLUSER]

Can you imagine a Beowulf cluster of...oh...wait...never mind.

Neat

[HomelessInLaJolla]

Are they hiring people to write an OS for it? Eventually all of those nodes need to be able to talk to a video card, display something on a screen, talk to a network card and communicate with the network in a fashion that the general public will expect.

I wouldn't even do it for the money. Provide me with a suitable environment and I would do it just because it would be enjoyable. I cannot do it while sleeping on the street and eating peanut butter and jelly, though.

I am trying to figure out if it would be a sin to work on a project like that. If housing and support were dependent on me working on a project then it would be a sin. If someone would say,"We trust that what you do isn't 'evil', here's a place to stay and an allotment for meals and resources, here are the specs that we have now, and here's a whole room full of dry erase boards. Have at it."

Re:Neat

[ZackSchil]

I have mod points and I was going to re-mod this post as something other than Troll, but none of the options fit any better.

There should be mods like "+0 Weird" or "+0 Rambling coherently".

Re:So?

[TubeSteak]

So how do you upgrade this? I would assume you would add more modules but that would increase the space of the computer and so tiny computers would be underpowered while you could get one the size of a large TV that would be lightning fast, but who wants a huge computer? Especially for a laptop or HTPC.

Define "tiny computers"
Cellphones have more processing power than the original room-sized super computers.
Heck, there are cellphones with more power than any desktop computer I owned during the 90's.

And define "huge computer"
Most of a mid-tower case is nothing but empty space
And since you can easily do audio/video processing in hardware,
there's no reason it wouldn't be perfectly fine for a HTPC.

Stargate: Replicators.....

[jameskojiro]

This is exactly how the replicators began.... Slow old 72Mhz processors and then you put enough of them together and the thing goes evil and start taking over the universe.....

Re:Stargate: Replicators.....

[joaommp]

Yeah, stand up for the bastards. Tiny tiny replicators that can't defend themselves.

It's now time to upgrade, literally...

[wjsteele]

into the 3rd Dimension. Imagine if they also had connectors on the top and bottom of the unit. We could then start to do real matrix programming. Once CPU could talk to 6 and traverse the levels or talk to peers depending on the need. If they were also on the diaganols, they could get even more complex. More like the human brain.

Wow, I'd really like to have about 512 of these to play around with! I can see doing something very cool with these and a little bit of fuzzy logic or neural network programming. I just wonder how addressing is handled.

Bill

Independent decision making modules

[Anonymous Coward]

Cell# 3712: Hey guys, have you noticed that #1914 never seems to accept requests?

Cell# 141: Well, he does sometimes reject.

Cell# 4439: I don't route to him very much anyway.

Cell# 1142: He rejected the last three of mine. I kind of agree.

Cell# 3712: So what should we do about it?

Cell# 141: Can't we just fry him? There's plenty of us anyway.

Cell# 3712: That's a bit harsh.

Cell# 4439: Ok, I got the records here showing that he rejected 90% of requests the last week but allocated two hundred percent of average power to himself.

Cell# 3712: That motherfucker, let's do it then.

Cell# 1142: I don't really want to fry him, but I don't mind that much if you do.

Cell# 141: Ok, gather up all your spare power, STAT!

Re:Independent decision making modules

[dha]

I love it.

Note that there's more truth in this fantasy than one might think, at least potentially. IXM nodes don't have the ability to fry each other, but they do supply each other with power, and that power switching is under software control.

So in many configurations, IXM nodes absolutely and literally do have the power to reach a consensus about a misbehaving neighbor and shut it down.

Re:What's the bus on this?

[commlinx]

I'd guess from the 14-pin connectors and the fact most smaller ARM microcontrollers can't do parallel data transfers under DMA they're using the SPI bus which may run at 72Mbps. Of course that would also mean the bus either needs to be shared for every device or operated in a token ring style with the associated propagation delays. I'd guess the latter because you'd be pushing to get 72MHz SPI data across a large number of devices due to the capacitance it would introduce to the transmission line.

All in all sounds like an interesting academic excercise but of no real-world importance. I expect they'll find all their power and cost savings will be eaten up by requiring hundreds of devices to compete with a single piece of silicon. A better commercial solution would be to put lots of ARM cores on single chips (or FPGAs for development) but then it would make sense to use a better bus arrangement so that would largely invalidate anything they develop.

Mainframe

[sexconker]

So it's a small, shitty mainframe.

Re:CPU, RAM, storage and ports in every 2 sq in?

[Arthur Grumbine]

David Ackley brags, "We have a CPU, RAM, data storage and serial ports for connectivity on every two square inches."

That sounds kinda expensive to me, even at only 72MHz/16K/128K per module.

Well it seems like Ackley misspoke (or was misquoted). The actual dimensions from one of their Official Retailers is 1.87" x 1.87" x 0.25". More like "2 inches square" (or 4 square inches) as opposed to "2 square inches". But at $55/each they are definitely not going to out-price/perform any Intel/AMD desktop chips on this first production run. But that's not what they're aiming for, judging from the inspired rhetoric on their main site, and their official retailer's site. They're more about a paradigm shift in computer building.

Pretty exciting stuff if they keep up the momentum. IMHO, the computer industry is definitely in need of a paradigm shift like this - to allow for easier, and more refined, modular scalability to provide the best support for upcoming industries like robotics and spaceflight

Great

[British]

You have just re-invented Lego. Seriously, I like this idea. Want a gaming system? Put these together. Want a server? Put those together instead. Some component break? Swap it out.

Finally! Very cool.

[suomynonAyletamitlU]

I've had exactly this idea for a couple years now, if not anywhere near a workable design. If it's done properly, it could be very interesting.

It being done properly would require:
* Distributed power
* Very high speed and high-reliability inter-module communication
* Hotplugging
* Standardized inter-module APIs and connectors
* An OS capable of organizing the entire system seamlessly (I have my ideas) and securely (I don't)

I can't speak to the technical abilities of such a system but if it was running it could easily become one of those sci-fi systems from the movies that everyone insists can be done but which has yet to appear--taking "your" part of the computer with you and just plugging your desktop session in to whatever computer you come across. You could also have software running on modules that is separate from the CPU, so that, for instance, your hard drive will not only defrag on its own when not busy, but will also do virus and spyware scans. And if you have a module that just absolutely can't be allowed to be reverse-engineered, have it have its own secret processor and instruction set with capabilities that are accessable to the system via APIs without the internal processes being at all open to the system.

I'm sure they wouldn't be interested, but I'll have to find and send an email to these guys.

Redundancy

[shadowblaster]

Can they make the cluster survive a destruction of several nodes?

There are many situations where this would be beneficial such as space craft design and military electronics. Even with several nodes severely damaged, the machine can re-route processing to the remaining nodes. Although overall processing speed might be reduced, there will be no loss of functionality.

Just great - Replicators.

[fahrbot-bot]

Replicators. First thing that popped into my mind.
Give those "Illuminato X Machina" things legs and we're all HOSED.

Re:So?

[Bakkster]

Larger computers are already more powerful in general than the same generation of smaller computers.

Small, fast, and cheap: pick two.