Can Transistors Be Made To Work When They're Off?
An anonymous reader writes "Engineers at the Belgian research institute IMEC are looking at the use of silicon transistors in the sub-threshold region of their operation as a way of pursuing ultra-low power goals. A chip the engineers are designing for biomedical applications could have blocks designed to operate at 0.2 or 0.3 volts, researchers said, according to EE Times. The threshold voltage is the point at which the transistor nominally switches off. Operating a transistor when it is 'off' would make use of the leakage conduction that is normally seen as wasted energy, according to the article."
I believe that if you were to try and utilize the leakage current, it would only cause that much more resistance, making it require more current to stay "off". This would be a good way to get a government grant in publishing some R&D for this, but in reality, I imagine that the amount of complexity that this would add to a device would outweigh any benefits. Plus, most transistors that just sit there in the off state are off because the entire device is off and doesn't require any current. The energy put into thinking about this would far outweigh any perceived benefits.
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As we've scaled deep into the submicron region, it's been getting harder and harder to turn the devices really "off". Leakage current has been rising and has been quite noticable for several generations now.
So the idea of doing useful work with subthreshold current sounds neat
(OK, I just went and read TFA.)
Still sounds neat, but...
In deep submicron part of the reason for the subthreshold leakage problems is control of Leff. (The effective channel length of the FETs.) There's a thing called "line length variation" which means that channel lengths in different parts of the chip will be different, sometimes subtly, sometimes not so subtly. Threshold voltage (Vt) is a strong function of channel length, making subthreshold leakage also a strong function of channel length. Performance characteristics will vary widely across the chip, likely much more than conventional transistor operation.
This will make it tough to scale down, (in feature size) scale up, (in chip size) and make manufacturable.
The living have better things to do than to continue hating the dead.
As far as I know (i.e., according to some professors I've spoken to), transistors in devices with extremely long battery lives, such as hearing aids and watches, are typically operated in sub-threshold in order to conserve power. Of course, these devices are also typically not speed-critical. A lot of biomedical applications probably fall under the umbrella of requiring low power (for battery life and/or thermal reasons) and not requiring high speed, making the application a natural fit for sub-threshold operation.
Forget the P = NP question - does PNP = NPN?
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Same here. I took VLSI Winter 2009 and we spent an inordinate amount of time studying and working on sub-threshold designs. Part of our final project (and final exam) was to produce a simulated and laid-out circuit using a sub-threshold supply. It's not very complicated, you just lower your clockspeed and source voltage, most of your existing circuits work just fine. The major problem is that they are now working at very low clockrates (KHz as opposed to MHz) which doesn't make too many people very excited.
The goal of low power transistors is reasonable, but a new transistor design may be needed. The brain can do a lot of operations with little power but in terms of clock speed, the brain isn't that fast. A similar design may be good for low power electronic decisions - massive number of circuits at low frequency.
Know your pads. One time pad: good for cryptography. Two timing pad: where to take your mistress.