Rethinking Computer Design For an Optical World

holy_calamity writes "Technology Review looks at how some traditions of computer architecture are up for grabs with the arrival of optical interconnects like Intel's 50Gbps link unveiled last week. The extra speed makes it possible to consider moving a server's RAM a few feet from its CPUs to aid cooling and moving memory and computational power to peripherals like laptop docks and monitors."

Comments

Here we go again

[overshoot]

This is eerily reminiscent of Intel's flirtation with Rambus: they were so focused on bandwidth that they sacrificed latency to get it. Yeah, the Pentium4 series racked up impressive GHz numbers but the actual performance lagged because the insanely deep Rambus-optimized pipeline stalled all the time waiting for the first byte of a cache miss to arrive.

Same goes for optical interconnect to memory: the flood may be Biblical when it arrives, but while waiting for it to arrive the processor isn't doing anything useful.

Now, peripherals are another matter. But if bandwidth were all it took, we'd be using 10 Gb/s PCI Express for memory right now.

Re:Here we go again

[demonbug]

This is eerily reminiscent of Intel's flirtation with Rambus: they were so focused on bandwidth that they sacrificed latency to get it. Yeah, the Pentium4 series racked up impressive GHz numbers but the actual performance lagged because the insanely deep Rambus-optimized pipeline stalled all the time waiting for the first byte of a cache miss to arrive.

Same goes for optical interconnect to memory: the flood may be Biblical when it arrives, but while waiting for it to arrive the processor isn't doing anything useful.

Now, peripherals are another matter. But if bandwidth were all it took, we'd be using 10 Gb/s PCI Express for memory right now.

I was thinking the same thing regarding latency and remote memory. If you've got your memory 1 physical meter away, you're already looking at something like 6.6 ns round-trip latency (in a vacuum) just for light traveling that physical distance; seems like once you include switching plus getting to/from the optical interconnect you're looking at some pretty serious latency issues compared to onboard RAM (I think DDR3 SDRAM is on the order of 7-9 ns).

Re:LightPeak

[The Master Control P]

I recommend reading the programmer's guide to a modern graphics architecture; Caching is essential to them.

Modern GPU architectures face the same clock speed/bus speed disparity and memory latency problems as CPUs and have taken their response much farther. They have several thousand registers per core and an L1 size & speed cache per processor group. Cache misses carry a typical penalty of several hundred cycles.