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AMD Details Upcoming Bulldozer Architecture
Vigile writes "AMD is taking the lid off quite a bit of information on its upcoming CPU architecture known as Bulldozer that is the first complete redesign over current processors. AMD's lineup has been relatively stagnant while Intel continued to innovate with Nehalem and Sandy Bridge (due late this year) and the Bulldozer refresh is badly needed to keep in step. The integrated north bridge, on-die memory controller and large shared L3 cache remain key components from the Athlon/Phenom generation to Bulldozer but AMD is adding features like dual-thread support per core (but with a unique implementation utilizing separate execution units for each thread), support for 256-bit SIMD operations (for upcoming AVX support) all running on GlobalFoundries 32nm SOI process technology."
A processor (or core) can only execute one instruction at a time, hyperthreading or not.
Uh, no. That hasn't been true for years.
Nehalem, I believe, can execute up to five instructions per clock per core; though you'll rarely be able to reach that limit.
Hey, dipshit "at a time" does not mean "per full clock cycle". IPC doesn't come into play - Hyperthreading is shit, and always has been. It was a bandaid approach to fix the shitty P4 architecture (which had no out-of-order execution). It is now a shitty marketing ploy to advertise a higher number of cores.
Anyone who actually uses hungry applications turns hyperthreading OFF because it actually HURTS performance in all scenarios but "I'm a retard and have 80 firefox tabs open" or "I'm a shitty synthetic benchmark app, please game me.".