New Silicon-Based Memory 5X Denser Than NAND Flash

Lucas123 writes "Researchers at Rice University said today they have been able to create a new non-volatile memory using nanocrystal wires as small as 5 nanometers wide that can make chips five times more dense than the 27 nanometer NAND flash memory being manufactured today. And, the memory is cheap because it uses silicon and not more expensive graphite as been used in previous iterations of the nanowire technology. The nanowires also allow stacking of layers to create 3-D memory, even more dense. 'The fact that they can do this in 3D makes makes it highly scalable. We've got memory that's made out of dirt-cheap material and it works,' a university spokesman said."

Comments

It has been obvious for years.

[symbolset]

When we run out of possibilities in shrinking the process we go vertical and take advantage of the third dimension. Moore's law is safe for a good long time.

This tech is still several years out from production but other 3D silicon options are in testing, and some are in production.

When the Z density matches the X and Y density in fifteen years or so we'll be ready for optical or quantum tech.

Re:It has been obvious for years.

[Anonymous Coward]

When the Z density matches the X and Y density in fifteen years or so we'll be ready for optical or quantum tech.

Or start taking advantage of the fourth dimension.

Re:It has been obvious for years.

[oldspewey]

You mean, by changing the contents of the memory over time? Now that's just crazy talk.

Re:It has been obvious for years.

[LifesABeach]

...5X Denser Than NAND Flash... Flash is sure taking a beating these days, first Apple, now Intel.

Re:It has been obvious for years.

[Surt]

We don't just go vertical without solving the heat dissipation problem. We already have a hard time dissipating the heat off the surface area of one layer. Now imagine trying to dissipate the heat off of the layer that is trapped between two more layers also generating the same amount of problematic heat. Then try to figure out how to dissipate the heat off a thousand layers to buy you just 10 more years of Moore's law.

Re:It has been obvious for years.

[Anonymous Coward]

Well, at least you have a theoretical possibility to avoid that problem in ssd-disks.
Since you are only going to access one part of the memory at a time the rest could be unpowered. This gives a constant heat do get rid of regardless of the number of layers.

This is of course not possible for CPU's and other circuits where all parts are supposed to be active.

Re:It has been obvious for years.

[symbolset]

The fine article holds an example of a technology that requires less power per transistor or unit of area. I recommend reading it if you can find the time. It's not the only such.

I was thinking millions of layers rather than thousands of course, but we'll start with two. That's the way of such things. Remember that at the same time we're going vertical the process size will still be shrinking with advancements in process technologies. We won't need any cache because the RAM will be inside the CPU - it will all be cache. Some of the technologies that cost a lot of power to get around the fact that some parts are "far" will go away because the processor will be folded into three dimensions.

Of course this deep in the thread it's entirely possible I'm talking to somebody who knows more about the physics involved than I do.

Re:It has been obvious for years.

[Jeremi]

We don't just go vertical without solving the heat dissipation problem

The obvious solution to that: don't generate any heat. Now, where are the room-temperature superconductors I was promised???

Re:It has been obvious for years.

[evilWurst]

It's not as obvious as it sounds. Some things get easier if you're basically still building a 2D chip but with one extra z layer for shorter routing. It quickly gets difficult if you decide you want your 6-core chip to now be a 6-layer one-core-per-layer chip. Three or four issues come to mind.

First is heat. Volume (a cubic function) grows faster than surface area (a square function). It's hard enough as it is to manage the hotspots on a 2D chip with a heatsink and fan on its largest side. With a small number of z layers, you would at the very least need to make sure the hotspots don't stack. For a more powerful chip, you'll have more gates, and therefore more heat. You may need to dedicate large regions of the chip for some kind of heat transfer, but this comes at the price of more complicated routing around it. You may need to redesign the entire structure of motherboards and cases to accommodate heatsinks and fans on both large sides of the CPU. Unfortunately, the shortest path between any two points is going to be through the center, but the hottest spot is also going to be the center, and the place that most needs some kind of chunk of metal to dissipate that heat is going to have to go through the center. In other words, nothing is going to scale as nicely as we like.

Second is delivering power and clock pulses everywhere. This is already a problem in 2D, despite the fact that radius (a linear function) scales slower than area and volume. There's so MUCH hardware on the chip that it's actually easier to have different parts run at different clock speeds and just translate where the parts meet, even though that means we get less speed than we could in an ideal machine. IIRC some of the benefit of the multiple clocking scheme is also to reduce heat generated, too. The more gates you add, the harder it gets to deliver a steady clock to each one, and the whole point of adding layers is so that we can add gates to make more powerful chips. Again, this means nothing will scale as nicely as we like (it already isn't going as nicely as we'd like in 2D). And you need to solve this at the same time as the heat problems.

Third is an insurmountable law of physics: the speed of light in our CPU and RAM wiring will never exceed the speed of light in vacuum. Since we're already slicing every second into 1-4 billion pieces, the amazing high speed of light ends up meaning that signals only travel a single-digit number of centimeters of wire per clock cycle. Adding z layers in order to add more gates means adding more wire, which is more distance, which means losing cycles just waiting for stuff to propagate through the chip. Oh, and with the added complexity of more layers and more gates, there's a higher number of possible paths through the chip, and they're going to be different lengths, and chip designers will need to juggle it all. Again, this means things won't scale nicely. And it's not the sort of problem that you can solve with longer pipelines - that actually adds more gates and more wiring. And trying to stuff more of the system into the same package as the CPU antagonizes the heat and power issues (while reducing our choices in buying stuff and in upgrading. Also, if the GPU and main memory performance *depend* on being inside the CPU package, replacement parts plugged into sockets on the motherboard are going to have inherent insurmountable disadvantages).

Re:It has been obvious for years.

[OeLeWaPpErKe]

2D : anything that only has connections in 2 directions. The fact that it's stacked does not change it's 2Dness, if the layers don't interact in a significant way (a book would not be considered 3d, nor even 2.5D, nor would a chip structured like a book).
2.5D : anything that has connections in 3 directions, but one of the directions is severely limited in what it can connect, and which way the wires can run (e.g. you can only have wires straight up with no further structure)
3D : true 3D means you can etch any 3d structure at all (meaning e.g. you can implement a transistor at a 30 degree angle from another)

The most advanced tech in silicon chips we have now is 2.5D, and these chips are still not fully 3D.

Re:It has been obvious for years.

[takev]

I think we will have to wait until we have super-semi conductors. One where it either conducts perfectly, or not at all, depending on a third input (which itself has an infinite resistance).

Maybe I should patend this "idea" for a transistor, I am probably to late though.

Re:It has been obvious for years.

[Alef]

First is heat. Volume (a cubic function) grows faster than surface area (a square function). It's hard enough as it is to manage the hotspots on a 2D chip with a heatsink and fan on its largest side. With a small number of z layers, you would at the very least need to make sure the hotspots don't stack.

I'm not saying your point is entirely invalid, however, heat isn't necessarily a problem if you can parallelize the computation. Rather the opposite, in fact. If you decrease clock frequency and voltage, you get a non-linear decrease of power for a linear decrease of processing power. This means two slower cores can produce the same total number of FLOPS as one fast core, while using less power (meaning less heat to dissipate). As an extreme example of where this can get you, consider the human brain -- a massively parallel 3D processing structure. The brain has an estimated processing power of 38*10^15 operations per second (according to this reference), while consuming about 20 W of power (reference). That is several orders of magnitude more operations per watt than current CPU:s have.

Re:It has been obvious for years.

[Anonymous Coward]

Now imagine trying to dissipate the heat off of the layer that is trapped between two more layers also generating the same amount of problematic heat. Then try to figure out how to dissipate the heat off a thousand layers to buy you just 10 more years of Moore's law.

Perforate the layers with thermal ducts - either metal rods or "chimneys" conducting cooling fluid (something of epically low viscosity)

Re:It has been obvious for years.

[petermgreen]

For low power but high transistor (or transistor substitute) count stuff like memory i'm inclined to agree with you.

For processors afaict the limiting factor is more how much power can we get rid of than how many transistors can we pack in.

Also (unless there is a radical change in how we make chips) going 3D is going to be expensive since each layer of tranistors (or transistor substitutes) will require seperate deposition, masking and etching steps.

Re:It has been obvious for years.

[Anonymous Coward]

is there any reason we can't put metal or a cavity between the layers to push air through? I'm thinking like a mine with support columns left in place out of the blasted rock.

Re:It has been obvious for years.

[Alioth]

The problem is for parallel operations, we start to run into Amdahl's Law: http://en.wikipedia.org/wiki/Amdahl's_law

Re:It has been obvious for years.

[Anonymous Coward]

What's worse. The power required per transistor doesn't drop and since there are more of them, all things being the same, power required roughly double per layer. You're not really scaling the transistor in the z. You are adding transistors in the Z dimension.

There's a few tricks though, flash requires a very low amount of power, and can possible be made to require even less. So even a layer of 25 only increases wattage by 25 watt

Re:It has been obvious for years.

[smaddox]

That would hardly help reduce heat generation in CMOS. At current gate lengths, a significant portion of the heat is generated due to leakage through the channel when the transistor is "off".

Maybe there is some switching device implementable with HTSCs that I am not familiar with, but it still wouldn't apply to silicon devices.

Re:It has been obvious for years.

[mcgrew]

You can't compare a brain to a computer; they are nothing alike. Brains are chemical, computers are electric. Brains are analog, computers are digital.

If heat dissipation in the brain was a problem, we wouldn't have evolved to have so much hair on our heads and so little elsewhere; lack of heat to the brain must have been an evolutionary stumbling block.

Re:It has been obvious for years.

[Idbar]

Now we just need to start powering processors with glucose and that's a solved problem. Next!

Re:It has been obvious for years.

[Surt]

Yes, it's non trivial. Such a gap would have to be more than a few air molecules wide to allow free flow (avoid turbulence against the edges). This would make the size of your third dimension grow much faster, negating a lot of the proposed benefit in terms of Moore's law scaling. Also, existing air-flow dissipation strategies just wind up heating the nearby air, and trying to dispose of that heat, which means we'd still have a growing problem to deal with ... so even if we've gotten the heat an inch away from the device with this strategy, we still have a thousand times as much heat in that inch to get even further away from the computer!

Re:It has been obvious for years.

[Surt]

Where does your heat from the ducts GO? You reach the surface of the device, and now you still have 1000 times the heat to dissipate that you had trouble dissipating with fans/heatsinks/liquid cooling already. And that assumes you can do a PERFECT job of reaching the surface of the device with your strategy.

Re:It has been obvious for years.

[Surt]

True, that does help with the ssd, as long as you don't try to write too much data too fast.

Re:It has been obvious for years.

[SilverEyes]

... consider the human brain -- a massively parallel 3D processing structure. The brain has an estimated processing power of 38*10^15 operations per second (according to this reference), while consuming about 20 W of power (reference)...

Good point. I believe I have solved Moore's Law in computing for some years. I need shovels, accomplices, and every Roger Corman movie.

Re:It has been obvious for years.

[mangu]

If heat dissipation in the brain was a problem, we wouldn't have evolved to have so much hair on our heads and so little elsewhere

Hair is insulation against the sun. The reason why Africans have curly hair is to provide insulation while letting cooling air circulate. In colder climates, straight hair still provides enough protection from the sun while letting some air circulate.

Re:It has been obvious for years.

[IICV]

Yes, but I'd like to see a human brain run the Sieve of Eratosthenes, or accurately simulate a 3-body orbit, or run a given large-scale cellular automata for more than a couple thousand steps.

There's times when parallel computing is useful, but there's also times when pure "how fast can you add 1 + 1" type calculations are incredibly useful. You can't just abandon linear computation completely.

Re:It has been obvious for years.

[SilverEyes]

There's a great shortcut if you're just adding 1 + 1 over and over. 1 + (previous sum), even... :P. Although I do understand what you are saying.

As another poster said, more efficient software / methods / (development process) is probably more important. The problem is that it's hard to balance development with slow, unreliable humans with good design.

Re:It has been obvious for years.

[Anonymous Coward]

This is an obviously easy fix. Relocate all memory to the Arctic... you will have no more heat problems.

Re:It has been obvious for years.

[Alef]

Indeed, although if the need for more processing power arises from increasing data sets, Amdahl's law isn't as relevant. (Amdahl's law applies when you try to solve an existing problem faster, not when you increase the size of a problem and try to solve it equally fast as before, which is often the case.)

I wasn't trying to say that we can parallelize every problem -- I was commenting that 3D processing structures might very well have merit, since it is useful in cases where you can parallelize. And those cases are not few.

Re:It has been obvious for years.

[Alef]

I'm not sure I would call the neurons either analog or digital -- they are more complicated than that. But regardless, both the brain and a computer do computations, which is the important aspect in this case.

Not that brain heat dissipation matters for the discussion (as we already know roughly how much energy the brain consumes), but as far as I can recall, some theories in evolutionary biology assumes that heat dissipation from the head actually has been a "problem".

Re:It has been obvious for years.

[Alef]

Yes, certainly we cannot abandon linear computation. The point I was trying to make is that the merit of 3D computational structures isn't nullified by problems with heat dissipation. They would be limited in the sense that they would need to be very parallel -- but that is still useful for a vast number of problems.

Re:It has been obvious for years.

[DigiShaman]

Along with wear leveling I'm sure the algorithm would also account for physical location of data too. If thermal sensors report back that all location are heat soaked, then an algorithm could throttle back read/writes. But the latter would have to be an extreme rarity for that to be required above and beyond engineering limitations.

Re:It has been obvious for years.

[aquila.solo]

I'd like to see a human brain run the Sieve of Eratosthenes, or accurately simulate a 3-body orbit, or run a given large-scale cellular automata

Those problems are all very well suited to parallel processing. I wonder if that's what you meant to imply, or if I misunderstood you.

Re:It has been obvious for years.

[mcgrew]

But regardless, both the brain and a computer do computations, which is the important aspect in this case

Both an abacus and a slide rule will do computations, too, but they're nothing alike, either. A computer is more like a toaster than a brain or slide rule; you have electrical resistance converting current to heat. The brain has nothing like that (nor does a slide rule or abacus, even though the friction of the beads agaiinst wires and the rules sliding must generate some heat).

Re:It has been obvious for years.

[sexconker]

We won't need any cache because the RAM will be inside the CPU - it will all be cache.

Pull the other one.

Re:It has been obvious for years.

[Alef]

The existence of the human brain shows that physics allows for three dimensional computing structures with very high processing power and low energy use and consequently low heat dissipation to exist. In other words, efficient computation (by todays standards) is not fundamentally limited to flat objects, if you can exploit parallelism.

Re:It has been obvious for years.

[Anonymous Coward]

...where are the room-temperature superconductors I was promised?

Avery Brooks has some of that installed in his flying car. Put on your Thompson eyephones and visit his virtual space, he'll tell you all about it.

Re:It has been obvious for years.

[mcgrew]

But it doesn't address the heat problem in electric circuts -- again, it's more like a toaster than a brain. And note that it takes a computer far less time to compute PI to the nth digit than it does the human brain, despite the brain's 3D model and the computer's 2D model.

Re:It has been obvious for years.

[symbolset]

No, really.

Re:It has been obvious for years.

[pclminion]

Such a thing would not be possible with current computer architectures, even if we had the materials. There is a fundamental theorem in physics/computing that the destruction of information causes an increase in entropy, i.e. generates heat. Thus, an information-destroying gate such as AND can never be completely free of inefficiency simply because it destroys information (if the output of AND is 0, you cannot tell if the input was 00, 01, or 10, therefore information was destroyed). Regardless of whether the components themselves are 100% efficient, the computing process must, in some manner, increase entropy by destroying information. The solution is reversible computing.

Re:It has been obvious for years.

[Skal Tura]

That would be because afaik most of the brains power goes into conceptualizing, and all kinds of other tasks. Pure maths is very small part of activities.
But then again, those people who's visual cortex (or whatever the area is called which handles visual data and eye movements) are simply amazing in maths. Autistic persons can do amazing things as well.

It's matter of how the horsepower is used, not availability in the case of brains. For brains it's an very easy task to detect objects, and attach all kinds of metainformation and experience based data on it instantly, without us even consciously knowing. Never mind all the fine motory skills we have. All brains, all brains.

Re:It has been obvious for years.

[Skal Tura]

For some people quite accurate visualization in 3D space, interactively realtime is very easy task. For most people it isn't.

You could say not everyone's operating system for their brains is the latest version.

Re:It has been obvious for years.

[Skal Tura]

Human brains is FAR from unreliable and slow. We don't just consciously know about the insane multitude of seemingly very trivial and simple tasks yet requiring immense processing power to make happen.

Can you stand on 1-leg? can you run and while running jump and keep running without falling down? Are you able to very delicately almost touch your girlfriend, but not really touch and she feels that, with all fingers in your hand and run your hand through her back, just almost touching?

All tasks of fine motory skills requiring immense processing power to make happen.

Re:It has been obvious for years.

[Anonymous Coward]

Memory storage cells don't typically generate a lot of heat - toggling transistors do. This type of application probably wouldn't have a lot of heat issues, although three dimensional active logic would require taking into account heat generation.

Re:It has been obvious for years.

[Anonymous Coward]

On the shelf next to the room temperature fusion.

Re:It has been obvious for years.

[jesset77]

The solution is reversible computing.

The first solution that comes to my mind (to your hypothetical limiting condition, at least ;D) would be to put leads on destructive logic gates to conserve the unused information electronically. Imagine an AND gate with a rarely used "remainder" bit, for example. Designers could glom on that if they wanted it, or if not lead most of the unutilized results off into a seeding algorithm for /dev/urandom, and the rest (those prone to entropy feedback) into controlling blinky LEDs.

Yeah, that's what they're really doing on all those sci-fi shows. Heat dissipation. 8I

Re:It has been obvious for years.

[anguirus.x]

That's fine, what does true 3D really gain for you though? Connections at angles other than 90 degrees are less efficient. Perhaps we could construct circuits like this to increase speed of calculations, by implementing algorithms geometrically, but in general we're going to choose digital means to perform these algorithms, since this is how we get one set circuit design to perform so many different tasks. 2.5D is exactly what we're looking for, which is increased capacity. I think parent is correct, but misinformed. We'll see optical/quantum tech for speed increases long before we max out capacity with 2.5D silicon tech.

Re:It has been obvious for years.

[anguirus.x]

All you need is interlaced layers of heat dissipating material. As this material improves one may decrease the frequency with which it's interlaced and thus increase capacity. Not to say this isn't a problem, just to say that the basic idea is simple and known.

Re:It has been obvious for years.

[metaforest]

A key difference here is that these memristor style storage cells dissipate very little energy during SET/RESET operations; far less than FLASH, or even DRAM. And they dissipate damn near nothing during read-sense operations. While the media access controller is still traditional CMOS, it is present only at one end of the stack, and thus can be cooled by attaching the die to a traditional ground plane heatsink, just as any other chip is.

It is perfectly reasonable to expect that memristors can be stacked quite deep in the Z axis and not suffer excessive heat build up within the array.

A more serious concern than heat dissipation in the storage cell array, is the huge amount of parasitic capacitance that these large arrays create. HP has some clever configurations that mitigate this capacitance, but it is a concern with tall stacks.

Memory crystals

[stox]

Nope, no one saw that one coming.

Re:Memory crystals

[Anonymous Coward]

But Captain the Memory Crystals are taken a beatin, i dont think theyll last much longer (Scottish Accent)

Re:Memory crystals

[sessamoid]

"And thees? Thees is rice?"

Re:Memory crystals

[Anonymous Coward]

Professor, is it true what they say that crystals have developed consciousnes?

Re:Memory crystals

[MadKeithV]

I think "Ridulan" would be a pretty cool brand name for these.

Re:Memory crystals

[Anonymous Coward]

A Frank Herbert /Dune reference, offtopic, on /.? *sniff*

Fool Me Once...

[Anonymous Coward]

We've got memory that's made out of dirt-cheap material and it works,' a university spokesman said.

Tell me when it's the head of manufacturing at XYZ Dirt-Cheap-Mass-Produced-Memory Corp saying that, then I'll care.

Re:Fool Me Once...

[aquila.solo]

Sand is made of silicon (and oxygen). Sand is "dirt cheap." I think that's about as far as you can take the implication. He didn't say "it's as easy as falling off a log."

Is anybody writing this down?

[Anonymous Coward]

How many of these 'breakthroughs' do we read about, and how many do we ever actually purchase? Does someone get paid for these kinds of articles?

Re:Is anybody writing this down?

[MichaelSmith]

All we ever see is a drop in the price of USB sticks in the shop, but under the surface the duck is paddling as hard as ever.

Re:Is anybody writing this down?

[HBoar]

how many do we ever actually purchase?

Some. Is that not enough to make it newsworthy?

Re:Is anybody writing this down?

[symbolset]

All of the tech we actually purchase comes out of tech published in articles like this one. Processor process technologies, bus evolutions, memory architectures, advancements in lithography are printed here and wind up in the products you buy. Not all of the articles are successful technologies but all of the successful technologies have articles and the time reading about the failures are the price we pay to know about such things in advance. Most of us don't mind, because there are lessons in failures too. Did you read the top of the page where it says "News for nerds."? Are you lost?

Digg is over here.

Re:Is anybody writing this down?

[Anonymous Coward]

Shh. One mustn't identify in public The Great Duck, herald and bringer of technology.

Re:Is anybody writing this down?

[fuzzyfuzzyfungus]

It would take a fair bit of archival research(and a great deal of definitional quibbling) to actually answer that question; but consider this:

Every breakthrough you have ever had the opportunity to purchase started out like this.

Re:Is anybody writing this down?

[Anonymous Coward]

Shh. One mustn't identify in public The Great Duck, herald and bringer of technology.

so that would make Microsoft The Great Duck Hunter then

Re:Is anybody writing this down?

[Yvan256]

Nope. Microsoft is that stupid dog that keeps laughing at you when you can't shoot the ducks.

Re:Is anybody writing this down?

[Surt]

That's not at all true. A lot of the technologies that have succeeded have been invented in the commercial labs, where people care about productizability. I think the criticism here is aimed at the university labs, where people invent stuff using outrageous amounts of money that is difficult or impossible to commercialize.

Re:Is anybody writing this down?

[TheRaven64]

This one actually seems pretty underwhelming. 5 times the density of flash? Flash density is doubling about every year, so they have less than three years to get it to market for it to compete with flash, and since it's currently at the university lab prototype stage, this seems wildly optimistic. If it's five times the density with the same process technology, then it would be impressive, but it sounds like it needs entirely new fabrication techniques, so it looks like the kind of thing that will just be surpassed by other (probably similar) incremental improvements from Intel and so on.

And, yes, someone does get paid for these articles. Why do you think MIT has the reputation it has? They do some good work, but they also employ a very competent publicity department. Read a peer-reviewed journal, and you'll find MIT represented about as well as a lot of other decent universities. Read a trade magazine, and you'll see ten times as many articles about MIT breakthroughs as any other university.

Re:Is anybody writing this down?

[radtea]

I think the criticism here is aimed at the university labs, where people invent stuff using outrageous amounts of money that is difficult or impossible to commercialize.

Absolutely. Commerical labs rarely do this kind of whizz-bang pre-announcement, which means that virtually any story like this is about a technology that is a) still in the lab and b) will never get out.

You have to get to the second page of the article to find out that some tiny tech company no one has ever heard of is "testing" a 1 kilo-bit chip these guys have made. That's right, a whole 128 bytes!

Unsurprisingly, the company is impressed. I was always impressed by the stuff my clients were doing too, when I was doing contract research.

Genuine "news for nerds" would talk more about the physics of the nano-wire processes, which look remarkably interesting. They are doing chemistry on the surface of the wires, from the look of it, forming and destroying atomic and molecular bonds reversibly using electric current. That's damned interesting at a fundamental level, not just a short-sighted "we can make gazillions of dollars on this one particular application!"

Re:Is anybody writing this down?

[Anonymous Coward]

How many of these 'breakthroughs' do we read about, and how many do we ever actually purchase? Does someone get paid for these kinds of articles?

How many hard drives have you purchased? Maybe you could read something and stop posting ignorant comments

http://physicsworld.com/cws/article/news/31421

http://nobelprize.org/nobel_prizes/physics/laureates/2007/press.html

http://en.wikipedia.org/wiki/Giant_magnetoresistance

Re:Is anybody writing this down?

[Surt]

Metamods: overrated unmoderated post.

I wouldn't be so sure

[TubeSteak]

"Dirt cheap" isn't here to stay.

Their technology requires polycrystalline silicon & the demand is increasing much faster than the supply.
China might build more polysilicon factories, but they'll undoubtedly reserve the output for their own uses.
This isn't a new problem, since mfgs have been complaining about shortages since 2006-ish (IIRC).

Re:I wouldn't be so sure

[Anonymous Coward]

Peak silicon. What a terrible day it will be when we start running out of it.

Seriously though, the dopants needed to make semiconductors tend to be rarer materials.

Re:I wouldn't be so sure

[fuzzyfuzzyfungus]

Were we to run out of silicon, it'd be time to find a new rock because something very serious has happened to this one. That said, the fact that silicon is among the most common of atoms tells us nothing about the short to medium term supply of sufficiently pure and correctly structured polycrystaline silicon.

If it takes 18 months to bring a plant online, that is pretty much the limit of the market's ability to cope with surprise demand(minus any slack in existing capacity that can be wrung out). For highly predictable stuff, no big deal, the plant will be built by the time we need it; but surprises can and do happen, even for common materials(especially given the degree to which "just in time" has come to dominate the supply chain. This isn't your merchant-princes of old, sitting on warehouses piled high. Inventory that isn't flowing like shit through a goose is considered a failure, with the rare exception of "national security" justified stockpiles or the rare hedge or futures position that is actually stored in kind, rather than in electronic accounts somewhere...)

Re:I wouldn't be so sure

[fyngyrz]

This isn't your merchant-princes of old, sitting on warehouses piled high. Inventory that isn't flowing like shit through a goose is considered a failure...

Sir! Sir! Yes, you! I have a package for you here; it's a plaque from from the "most awesome remarks ever" voting board. Yes, that's right, sign here, initial there. Yes, you too sir. Have a good day, sir.

Re:I wouldn't be so sure

[Anonymous Coward]

Well first their technology doesn't require polycrystalline silicon, there's no reason for it not to work with any kind of conducting electrode (they used carbon nanotube as electrodes to observe the effect in a highly localized way during their study).
And secondly, this is a component that would be created by standard CMOS process on a standard [monocrystalline] silicon wafer. If they need polysilicon somewhere in their component then they'll simply deposit it, it's not like this is an uncommon process step.

What you are talking about is bulk polysilicon substrates for solar cells. This application requires much more surface area than microelectronics (which was until recently the only user of polysilicon ingots - they're further processed into monosilicon to make wafers) and that's why the production is lacking. But that doesn't mean the whole microelectronics industry is going to collapse because solar panels eat the world's entire silicon processing capacity.

Re:I wouldn't be so sure

[Anonymous Coward]

You underestimate the capabilities of capitalism, Where there is money to be made they will come.

Re:I wouldn't be so sure

[fuzzyfuzzyfungus]

I don't think I do. More money will (typically) speed a process; but there are hard limits. You can pay overtime, run lights all night, bribe permitting guys; but concrete still takes time to set. Steel still takes time to assemble. Fine-tuning touchy chemical processes isn't instant.

You can certainly hire better people faster by throwing more money at them; but that isn't instant either.

The exact shape of the tradeoff curve between time and money varies by enterprise; but it never passes through T=0...

Re:I wouldn't be so sure

[Lanteran]

well seeing as silicon is the second most abundant material in the earth's crust behind oxygen (25% by mass) 'peak silicone' is out. The only way I can see this occurring is if everyone's too busy getting bailouts and complaining about the economy to capitalize on an under-supplied market.

Re:I wouldn't be so sure

[Anonymous Coward]

I think you meant 'monocrystaline'. Wafers are sliced from a single huge baloney of a crystal.

Re:I wouldn't be so sure

[fuzzyfuzzyfungus]

TFA says that they were using polycrystalline(commonly seen in photovoltaic panels and similar), rather than the monocrystaline wafers that the chip guys use.

I'm not sure if this was an economic choice, or if there is some impenetrable-to-mere-laymen solid state physics reason; but they say they are using polycrystalline slices...

Great, it's denser.

[DWMorse]

Great, it's denser. Does this mean it now comes in a yellow-white, almost blonde color?

Re:Great, it's denser.

[spazekaat]

Great, it's denser. Does this mean it now comes in a yellow-white, almost blonde color?

Wot, you mean Paris Hilton?????

Re:Great, it's denser.

[RivenAleem]

I'd say it's a safe bet you won't insult anyone on /. with that comment

25x more dense, not 5x more dense...

[StandardCell]

If a single dimension changes, assuming the NAND cell structure is similar, there would be a 5x reduction in size in each of the X and Y dimensions. Therefore, you would get up to 25x more density than a current NAND. This is why process technologies roughly target the smallest drawn dimension to progressively double gate density every generation (i.e. 45nm has 2x more cells than 32nm).

The big question I have for all of these technologies is whether or not is is mass production worthy and reliable over a normal usage life.

Re:25x more dense, not 5x more dense...

[noidentity]

If a single dimension changes, assuming the NAND cell structure is similar, there would be a 5x reduction in size in each of the X and Y dimensions. Therefore, you would get up to 25x more density than a current NAND. This is why process technologies roughly target the smallest drawn dimension to progressively double gate density every generation (i.e. 45nm has 2x more cells than 32nm).

I was going to let this slide, but you blew it at the end. Let's assume you meant to say that 32nm has 2x more cells than 45nm. That's still wrong.

The 32nm one can fit the same cell in half the area. I think we agree so far. This means that in the same area, the 32nm one has twice the number of cells than the 45nm one. It does NOT have two times more; it only has one time more. It'd be like saying that a human has two eyes more than a cyclops. A human has twice the number of eyes, but only one eye more.

This is an amazingly common error I see often here on Slashdot, given that many of us are programmers. "X is two times more than Y" translates as X = 2*Y + Y. The English version of X = 2*Y is "X is two times Y".

Re:25x more dense, not 5x more dense...

[Randle_Revar]

Math is easy, it's English that's tricky.

Re:25x more dense, not 5x more dense...

[athe!st]

it only has one time more

I was going to let this slide, but you blew it at the end (and in the middle). "Two times more" is perfectly acceptable and correct english, it means the same as "double the number of cells". "one times more" does not makes sense at all, I think you are getting confused with "100% more" which also means double

"X is two times more than Y" translates as X = 2*Y + Y

Im sorry, but no, just no, it does not mean that. Your confusion seems to be about the word "more" eg. "there are twice as many apples in that box" and "there are two times more apples in that box" both mean the SAME I'm English, I know.

Re:25x more dense, not 5x more dense...

[noidentity]

Just trying to follow what you're saying. You're saying that "X is 200% more than Y" means X=2*Y+Y, but that "X is 2x more than Y" means X=2*Y. I thought that "200%" was synonymous with "2 times".

Ignoring percentages and simply focusing on "X is two times more than Y" meaning X=2*Y, I'm assuming that "X is 1.1 times more than Y" means X=1.1*Y. Does "X is 0.5 times more than Y" mean that X=0.5*Y, that X is actually less than Y? Would this mean that "X is 0 times more than Y" means that X=0?

A useful guide I found on this topic: Common errors in forming arithmetic comparisons

Superman Technology

[Anonymous Coward]

Weren't those crystals from the cave a similar technology? Luthor Corp. may sue them!

obligatory pessimum

[Anonymous Coward]

I expect it to cost 10x as much as standard $/gig, expect it to come in a proprietary format that is never adopted by industry and never incorporated into everyday devices.

But you've got to cool it ...

[JoeBuck]

... which may limit how much of the 3rd dimension you can use.

Here they come...

[LostCluster]

Best Buy and Amazon are both selling Intel's 40 GB flash drive for just under $100 this week... I'm building a server based around it and will likely later post on how that goes. Intel recently announced that they're upping the sizes so you're likely going to see the 40 GB model in the clearance bin soon.

It's here, it's ready... and when you don't have a TB of data to store they're a great choice, especially when you read much more often that you write.

Re:Here they come...

[afidel]

Eh, hope that server isn't going to be doing anything transactional, the only Intel SSD I'd trust in any of my servers that actually need SSD's is the X-25e which I have actually used.

density isn't everything

[krupan]

So it's more dense than NAND flash (and 3D, wow!), but how does it compare on speed, reliability, and endurance?

Re:density isn't everything

[Yvan256]

how does it compare on speed, reliability, and endurance

No, yes, maybe.

Re:density isn't everything

[c0lo]

So it's more dense than NAND flash (and 3D, wow!), but how does it compare on speed, reliability, and endurance?

Taking a wild-guess here.
TFA states that the 1/0 is stored as a nanowire that is continuous/interrupted (thus not require any electric charge).

Yao applied a charge to the electrodes, which created a conductive pathway by stripping oxygen atoms from the silicon oxide, forming a chain of nanometer-sized silicon crystals. Once formed, the chain can be repeatedly broken and reconnected by applying a pulse of varying voltage, the University said.

It seems reasonable to think:

• speed - blind-fast reads with very low currents. Writes (which will require currents to make/break the nanowire) might be slow and will certainly require higher currents (how fast the oxygen atoms can migrate at the nm scale in silicon dioxide?)
• reliability - high - no electric charge required to store the info (reliable reads). Writes - probably high as well (based on, for example, "If at first you don't succeed, try try again" scheme)
• endurance - practically infinite for reads (even in harsh conditions of radiations - no electric charge). Writes? Probably limited but I doubt that even the researchers do know

Re:density isn't everything

[Anonymous Coward]

Let me quote the abstract: Meanwhile, the switch also shows robust nonvolatile properties, high ON/OFF ratios (>10^5), fast switching (sub-100-ns), and good endurance (10^4 write-erase cycles).
We do in fact have the data for writing speed (pretty good) and endurance (one order of magnitude less than SLC NAND Flash and comparable to MLC NAND Flash, according to Wikipedia, which is good too). And they're pretty promising, I must say.

What to call this new tech?

[Anonymous Coward]

We should probably call them Holocrons...that is all.

24 nanometers, not 27

[Chimel31]

Toshiba has started mass production of 24nm NAND cells. Just saying...
Intel and Micron are already at 25nm in their most recent production lines, Hynix at 26nm.
Only Samsung, albeit the world's first NAND manufacturer, seems to be at 27nm.

What about performance?

[Mikachu]

Okay, so they claim that the memory is denser than NAND, and cheap to boot. That's great. But TFA makes no mention of its performance. How does the read/write speed compare to that of NAND, or magnetic drives? Could the 3D architecture potentially slow read/write times? I'm not trying to make any claims here, but it's a little disconcerting that there is no mention of it at all within the article.

Re:What about performance?

[M. Kristopeit]

either way it's going to depend on the application using drive... perhaps extremely frequent writes on a few blocks would be much faster or slower than a 2D architecture... perhaps multiple continuous large writes would be better multiplexed for higher throughput... perhaps less...

you'd really need to see a detailed report from a quality benchmarking tool that could emulate different real world conditions.

... and reconfigurable.

[steeleyeball]

I like what the computerworld.com article says about what they are doing with the company NuPGA... Can anyone say "Isolinear chips"? Can you imaging denser FPGAs with more memory that are heat and possibly radiation resistant? ... Processor, cache and chipset all in one made to order.

And if you want a big SSD

[symbolset]

And if you do need a big SSD Kingston has had a laptop 512GB SSD out since May with huge performance, and this month Toshiba and Samsung will both step up to compete and bring the price down. We're getting close to retiring mechanical media in the first tier. Intel's research shows failure rates of SSD at 10% that of mechanical media. Google will probably have a whitepaper out in the next six months on this issue too.

This is essential because for server consolidation and VDI the storage bottleneck has become an impassable gate with spinning media. These SSDs are being used in shared storage devices (SANs) to deliver the IOPs required to solve this problem. Because incumbent vendors make millions from each of their racks-of-disks SANs, they're not about to migrate to inexpensive SSD, so you'll see SAN products from startups take the field here. The surest way to get your startup bought by an old-school SAN vendor for $Billions is to put a custom derivative of OpenFiler on a dense rack of these SSDs and dish it up as block storage over the user's choice of FC, iSCSI or Infiniband as well as NFS and SAMBA file based storage. To get the best bang for the buck, adapt the BackBlaze box for SFF SSD drives. Remember to architect for differences in drive bandwidths or you'll build in bottlenecks that will be hard to overcome later and drive business to your competitors with more forethought. Hint: When you're striping in a Commit-on-Write log-based storage architecture it's OK to oversubscribe individual drive bandwiths in your fanout to a certain multiple because the blocking issue is latency, not bandwidth. For extra credit, implement deduplication and back the SSD storage with supercapacitors and/or an immense battery powered write cache RAM for nearly instantaneous reliable write commits.

I should probably file for a patent on that, but I won't. If you want to then let me suggest "aggregation of common architectures to create synergistic fusion catalysts for progress" as a working title.

That leaves the network bandwidth problem to solve, but I guess I can leave that for another post.

Re:And if you want a big SSD

[afidel]

TMS already made such a product with their RAMSAN, it's a niche player for those who need more IOPS than god and don't need to store very much (ie a niche market). Their top end product claims to do 5M IOPS, 60GB/s sustained but only stores 100TB which is the size of a midend array like a loaded HP EVA 6400 but costing about 20x more (granted the EVA tops out in the tens of thousands of IOPS, but that's enough for the vast majority of workloads).

Re:And if you want a big SSD

[symbolset]

Tens of thousands of IOPs (assuming a reasonable block size and write fraction) is a typical metric for a single industry standard server running consolidated workloads with dual Westmere processors and 192GB of RAM. For the same single server doing VDI in an 8AM boot storm condition it's nowhere near enough. Servers aren't going to become less capable next year, and high end servers with 64 cores and 2TB of RAM can already grind that much spinning disc SAN to dust today, saturating bandwidth, disk, cache and processor simultaneously. God forbid you should connect that SAN to a blade system with 16 such servers, let alone a few racks of them. The poor thing would give up.

I hear the RAMSAN dishes the IOPs, but it's spendy.

Re:And if you want a big SSD

[afidel]

Really? Then my load must be very a-typical because I have about a rackfull of database servers and another rack of 144GB x5570 VM servers hitting a half full 6400 and it's not complaining let alone being ground to dust =) Now I'm not doing VDI because I haven't seen a TCO calculation that passes the smell test but from what I've seen in benchmarks and white papers putting a few of the HP SSD's into the 6400 should settle the boot storm problem. Is it possible to completely overwhelm such a SAN with just a few nodes, sure but those aren't typical workloads for ~99% of the customer base.

Re:And if you want a big SSD

[adolf]

And you, sir, win the Bullshit of the Day award.

Congrats!

Re:And if you want a big SSD

[symbolset]

I would guess your experience is atypical, but you seem to have a good handle on the metrics. It seems likely your servers aren't maxing their I/O, so you're distributing the load appropriately to get good response times for your use case. I'll bet those servers could grind up your SAN if they tried. The HP EVA (all versions) maxes out at 8x 72GB SSD's per array so you're unlikely to get a lot of VDI images on that after it's RAIDed and carved into LUNs. A single W7 image runs 10GB or more with Office. Even with smartclones most people need several images for production and several more for test/dev and that capacity runs out quick.

You're right on the VDI TCO calc too. We need that cheap SSD SAN to bring the storage cost down. RAM is still a bit high, and with ASLR and large memory pages you don't get the returns on RAM dedupe that VMWare would like to advertise, so the RAM requirements are the same and in VDI it's more expensive RAM than the desktop replacement RAM that's the alternative. Most of the sales folk are pushing the manageability and security aspect therefore, but to me it doesn't make sense unless you can deliver a better experience to the end customer than he had before, and that means IOPs. If you can do Android desktops you're in the money today though.

It's late, and I'm off to bed. G'nite.

Re:And if you want a big SSD

[RivenAleem]

more IOPS than god

God doesn't need any Outputs. It's all one-way traffic with him.

Re:And if you want a big SSD

[afidel]

490GB should be enough for as many linked clone's as you're likely to need.

Well that may be problematic

[Sycraft-fu]

One thing you could run in to are heat issues. Remember that high performance chips tend to give off a lot of heat. Memory isn't as bad, but it still warms up. Start stacking layers on top of each other and it could be a problem.

Who knows? We may be in for a slowing down of transistor count growth rate. That may not mean a slow down in performance, perhaps other materials or processes will allow for speed increases. While lightspeed is a limit, that doesn't mean parts of a CPU couldn't run very fast.

Also it may slow down. Exponential growth doesn't last for ever. We may start to hit the limits of what we can do.

Have to see.

Re:Well that may be problematic

[symbolset]

They're all over that. As the transistors shrink they give off less heat. New transistor technologies also use less energy each per square nanometer, and there's new ones in the pipe. Not all of the parts of a CPU, SSD cell or RAM chip are working at the same time so intelligent distribution of the loads give more thermal savings. Then there are new technologies for conducting the heat out of the hotspots, including using artificial diamond as a substrate rather than silicon, or as an intermediary electrical isolation layer as well as a thermal conductor. If they can solve the carbon or silicon layer deposition issues the thermal issues will be OK.

An interesting evolution of 3D in semiconductors will be leveraging different parts of the processor in three dimensions. This should resolve many of the speed-of-light and latency issues designers have struggled with for some years.

Re:Well that may be problematic

[aXis100]

If they were making the same spec part that would be fine, but as transistors shrink they cram more into the same space, so total heat flux tends to go up. Also the leakage gets worse too - but that gets offset by lower voltages.

Re:Well that may be problematic

[repapetilto]

This might be a dumb question, but why not have some sort of capillary-esque network with a high heat-capacity fluid being pumped through it? Maybe even just deionized water if you have a way of keeping the resistivity high enough.

Re:Well that may be problematic

[Anonymous Coward]

I remember reading somewhere about mircochannels being put directly on the chip and through the chip itself.

Re:Well that may be problematic

[vlueboy]

L1 CPU caches are shamefully stuck with the laughable 20-year old 640K meme in rarely noticed ways. Everyone's first thought is about RAM memory, but remember that CPU's are less change friendly and benefit more from tech like 128K * 5 size at the new density improvement.

Our supposedly macho CPU's have only 128K L1 sizes and comparably, absurdly high L2 and L3 sizes to make up.

The current excuse is that cost and die-space constraints keep size-improvements mostly on the L2 and L3 side. Sadly, someone tagged the article "tenyears" and we'll be dealing with different research by then, like utilizing today's 64 bit, multi-core technology to its fullest.

Re:Well that may be problematic

[marcosdumay]

The problem with such kind of proposals is that there is no means to actualy build the channels. It is a great idea in theory, and quite obvious (so there is a huge amount of research already on it), but nobody could actualy build it.

Re:Well that may be problematic

[mcgrew]

Exponential growth doesn't last for ever.

Don't be too sure; the human population has been growing more or less exponentially for a million years.

Re:Well that may be problematic

[Dragoniz3r]

If I remember correctly, the reason is because on a nano-scale, water doesn't "flow", so you can't pump it through effectively.

Re:Well that may be problematic

[jebrew]

I assume by 'less' in that sentence you're referring to the Black Plague?

Re:Well that may be problematic

[Anonymous Coward]

Thank you! Finally someone mentions MEMS!

Re:Well that may be problematic

[jonathanleong]

Also it may slow down. Exponential growth doesn't last for ever. We may start to hit the limits of what we can do.

Have to see.

I wonder how much we could get out of existing hardware if we put a lot more effort into researching software methods to increase efficiency?

Re:Well that may be problematic

[mcgrew]

That and a few other catastrophes.

Re:Well that may be problematic

[Calinous]

Tell that to the first world war, second world war, famines, plagues, mongols and so on.

Not to be too critical...

[symbolset]

Not to be too critical, but did you actually read all of the post you responded to? I know expecting one to read the summary is a bit much, and expecting one to read the fine article is completely out of the question on modern slashdot, but at least reading the comment you're responding to still seems to be a reasonable expectation.

Re:Not to be too critical...

[Jane Q. Public]

Yes I did, but I admit that in reading it fast, I missed this part: "but other 3D silicon options are in testing, and some are in production". Without that, it was reasonable to presume that "this tech" referred to the previous sentence.

As for TFA, I read the whole thing yesterday, well before it ever hit Slashdot.

Re:Sigh...

[afidel]

Some supercapacitors have made it to market and refinements on lithium technologies have come a long way in the last decade, tripling the maximum storage density available. The problem is our demand for portable power has outstripped that growth (my blackberry is significantly more powerful than my desktop from 10 years ago and talks 6 different wireless protocols).

so how wide is 5nm?

[ChipMonk]

The radius of a silicon atom is 111 to 210 picometers, depending on the measurement context. (Check Wikipedia to see what I mean.) That means 5nm is somewhere between 23 and 45 silicon atoms wide.

Re:so how wide is 5nm?

[Anonymous Coward]

The radius of a silicon atom is 111 to 210 picometers, depending on the measurement context. (Check Wikipedia to see what I mean.) That means 5nm is somewhere between 23 and 45 silicon atoms wide.

the width of the nanowire divided by the atomic radius doesn't tell you how many atoms are there. Silicon forms a crystal, an ordered lattice structure. The lattice constant, or spacing between atoms is not the radius of the atoms. It is also listed on wikipedia though, its about half a nanometer.

Will special glasses be needed to read 3D memory?

[PatPending]

If so, count me out! Besides 3D makes me nauseated.

looking for high density ROM to stop digital decay

[OrangeTide]

I'm still waiting for some cheap, stable, high density ROM or preferably WORM/PROM. Even flash has only about 20 years retention with the power off. Which sounds like a lot, but it's not all that difficult to find a working synthesizer or drum machine from the mid-80s in working condition. But if you put flash in everything your favorite devices may be dead in 20 years. for most devices this is OK. But what if some of us want to build something a little more permanent? Like an art piece, a space probe, a DSP based guitar effects pedal, or a car?

Some kind of device with some nano wires that I can fuse to a plate or something with voltage would be nice if it could be made in a density of at least 256Mbit (just an arbitrary number I picked). EPROMs (with the little UV window) also only last for about 10-20 years (and a PROM is just an EPROM without a window). So we should expect to already have this digital decay problem in older electronics. Luckily for high volumes it was cheaper to use a mask ROM than a PROM or EPROM. But these days NAND flash(MLC) is so cheap and high density that mask ROMs seem like a thing of the past, to the point that it is difficult to find a place that can do mask ROMs that can also do high density wafers.

What about reliability?

[Anonymous Coward]

Not a peep in TFA.. How many read/write cycles? How does the memory degrade over time?

Silicon...

[Hylandr]

So manufacturing with Silicon now huh?

How with this new ram be measured for Capacity? B, C, D or DD?

- Dan.

Re:Silicon...

[DWMorse]

If you're using silicon, and only getting a B out of it... get your money back!

Cheap???

[codeButcher]

We've got memory that's made out of dirt-cheap material and it works

I guess the materials alone don't determine the price, but the expertise/work to put them together. I'm also typing on a computer that's made out of cheap materials (lots of plastic, some alumin(i)um, small quantities of other stuff) - but it didn't come that cheap.

Re:Cheap???

[mcgrew]

Sure it did. When the IBM-PC came out with a 4 mz processor and 64kb of RAM it cost ~$4,000. My netbook has an 1800mz processor, 1,000,000kb of ram plus a 180gb hard drive, and it cost ~$300. I'd say that's pretty damned cheap.

are you fucking r-worded?

[Anonymous Coward]

if so, that was funny as hell and I recommend you look into a career doing standup comedy

beans and cornbread!

Oblig B5 joke

[tenco]

Silicon-based lifeforms 5x denser than carbon-based.

Re:looking for high density ROM to stop digital de

[EETech1]

I've seen many application notes relating to long term flash memory reliability in embedded applications, and they all recommend having the bootloader, or application rewrite pages periodically to recharge the flash memory and this will allow the device to provide over 20 or so years of guaranteed operation.

Now it does nothing to guarantee a 20 + year shelf life if left unpowered (service parts). Hopefully if you are the manufacturer, you retained the required cables / interfaces / software / computers / knowledge you need to be able to reprogram your own stuff 10 - 20 years from now so your replacment parts don't die on the shelf right along with the ones that have been working in the field for 20 years!

Re:looking for high density ROM to stop digital de

[mr_mischief]

My parents were told that they were lucky the clutch and clutch plate in their car could be replaced, because the car is a whopping 16 years old. A different part for a different model had to be fitted by a tech who happened to be able to figure out it would work, then the adjustments needed to be twiddled. If Ford Motor Company has problems with the rate at which parts become obsolete, I don't imagine many CE companies are planning for 20-year serviceability either.

There's only so much you need

[Sycraft-fu]

Cache is not a case where more is necessary. What you discover is it is something of a logarithmic function in terms of amount of cache vs performance. On that scale, 100% would be the speed you would achieve if all RAM were cache speed, 0% is RAM only speed. With current designs, you get in the 95%+ range. Adding more gains you little.

Now not everything works quite the same. Servers often need more cache for ideal performance so you'll find some server chips have more. In systems with a lot of physical CPUs, more cache can be important too so you see more on some of the heavy hitting CPUs like Power and Itanium.

At any rate you discover that the chip makers are reasonably good with the tradeoff in terms of cache and other die uses and this is demonstrable because with normal workloads, CPUs are not memory starved. If the CPU was continually waiting on data it would have to work below peak capacity.

In fact you can see this well with the Core i7s. There are two different kinds, the 800s and the 900s and they run on different boards, with different memory setups. The 900s feature faster memory by a good bit. However, for most consumer workloads, you see no performance difference with equal clocks. What that means is that the cache is being kept full by the RAM, despite the slower speed, and the CPU isn't waiting. On some pro stuff you do find that the increased memory bandwidth helps, the 800s are getting bandwidth starved. More cache could also possibly fix that problem, but perhaps not as well.

Bigger caches are fine, but only if there's a performance improvement. No matter how small transistors get, space on a CPU will always be precious. You can always do something else with them other than memory, if it isn't useful.

Re:There's only so much you need

[Anonymous Coward]

With current designs, you get in the 95%+ range

That is true but most cache designs of the past few years are in relation to 1 process. What about when there are 70+ running? A bigger cache in this instance is a good thing. The only reason we have cache is because we can not get the whole memory subsystem on board with the CPU. It will happen. But not until about the .15 mark. Even then there will still be 2 layered systems where there is 8 gig of 'cache' and 32gig of memory. Running near the CPU and getting blocks memory in less than one tick would be huge. With many computers not even using the L3 of memory and just using the onboard CPU memory. This will happen. You will then see cache disappear within a couple of cpu generations.

that's quite the range

[Anonymous Coward]

(James) Tour, a professor of mechanical engineering and materials science and computer science

This guy has got his hands in on at least three normally separate departments.
Probably had to turn down the faculty Dean-ship due the existence of only 24-hours in a day.

Brain consumes more power than the average CPU

[Anonymous Coward]

The only way the brain consumes 20W of power is if you exclusively count the power it takes to replenish the ion channels after firing. If the power supply to your head decreases below 80W, you pass out. If it drops below 40W, you will go into coma. If it ever gets to 20W ... I don't think you'll ever wake back up.

The whole point of having a head is cooling. Unless you think evolution/God (who cares) put our brain on a long stick where it can get trivially critically damaged from every direction (except one : your head is quite capable of absorbing shocks from directly in front of you, but every other direction ... You can expect walk away with a headache from a 8000 newton impact on your forehead (assuming you land safely), while 80 newton impacts on the ear have been known to cause permanent comatose states)

One thing that is massively different between human races (and even intra-races) is the power consumption in the head, although it seems to have more to do with the food you get as a baby than with genes. If you take a somali 30-year old, the brain only uses 50-60W at best, while you'll be hard pressed to find a Eropean child with less than 100W power usage in his head. Mostly brain power consumption drops because of energy shortage (ie. famine and the like), however it hardly recovers once the famine ends. If, as a child, you experience a famine before 2-3 years, you're dumb for life.

Re:Brain consumes more power than the average CPU

[WrongSizeGlass]

The whole point of having a head is cooling.

Not so ... the whole point of having a head is to have a place to wear your hat. Every time I wear my hat on the front of my zipper I seem to get in trouble. I'm just sayin' ...

Re:Brain consumes more power than the average CPU

[Alef]

You have a point in that the body also consumes power, and is a required support system for the brain (much like my computer needs a PSU, motherboard, memory circuits, etc). However, 100 W is still extremely low from an energy per computation perspective.

Re:Brain consumes more power than the average CPU

[Anonymous Coward]

Where did you get those numbers? I'm curious.

Some quick and dumb math tells me that on a 2500kcal diet, you have ~2900 Watt-hours a day, which gives an average of ~120 Watts. So you're telling me the brain uses over 80% the energy available to the whole body? That's odd.

But then again, I don't have a clue about the subject. Can you provide some links so I can read more about it?

Re:Brain consumes more power than the average CPU

[Anonymous Coward]

That doesn't sound that far-fetched, if you consider that for 8 hours you'll be in a low-energy state (sleeping, does the brain still need 100W when sleeping, I wouldn't have thought so for most of the sleep period, but I don't know) and also the 2500kcal intake recommendation is for the modern relatively sedentary lifestyle, the human body can get through a hell of a lot more energy in a day if pushed.

But when will it be able to do ...

[Skapare]

... 18,446,744,073,709,551,616 erase/write cycles?

the new news sucks

[mestar]

Boy do I miss the old news, they way they would write this one for example, would be to put some large number for the thumb drives, as in

"USB thumb drives of in the future could reach 150 terabytes."

Or something.

Want one now!

[hesaigo999ca]

Enough with all these coming to you soon posts, I want a fact filled specimen with ready to be bought now presentation with the stores that carry them, might be another 3 years before we see any of these....!

Re:looking for high density ROM to stop digital de

[OrangeTide]

It is still quite easy to buy replacement parts for 1970s Fords, Chevys and Chryslers, most of them are third party aftermarket parts. If your parents took their old car to the dealer, that is likely why there were problems acquiring the part because they will just looking in inventories of OEM parts. An independent mechanic can do a broader search and save you quite a bit of money when fixing an old car.

This sounds great, but...

[Jenny Z]

Density and cost may be the holy grail, but there are a number of other properties which important which can make the difference between marketplace success or failure.

1.) Data Reliability
2.) Data Lifetime
3.) Store element lifetime - do the individual storage locations 'wear out' like flash?
3.) Read/Write Speed - Although there is an article in Science Daily which reports 100ns
4.) Power Requirement

I didn't see any of these mentioned in the article. If these properties are all equal to or superior to flash, it could be the next big thing.

Re:looking for high density ROM to stop digital de

[squizzar]

My car is 17 years old and all the parts I can think of are available. I can still get replacement cylinder heads (albeit at uneconomical prices), not to mention all the other parts I can think of. The only stuff that seems to be unobtainable is the alarm key fobs... I've had Land Rovers that are older than I am, and someone built a complete one from parts a couple of years back. As parent says, either your dealer couldn't/wouldn't lookup aftermarket parts or you bought one rare-as-rocking-horse-poo car.

Re:looking for high density ROM to stop digital de

[hitmark]

Time dependent flash sounds like the dream world for planned obsolescence driven corporations...

Hmm...

[hitmark]

Stripping oxygen sounds very similar to the memristor process.

Re:Hmm...

[metaforest]

It is important to note that ALL of the nano-wire meshes are memristor based. It turns out that at nano-scale it is hard NOT to get a structure that has memristor behavior. IFF you have a pinched hysteresis loop in the I-V plane, THEN you have a memristor.