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New Silicon-Based Memory 5X Denser Than NAND Flash
Lucas123 writes "Researchers at Rice University said today they have been able to create a new non-volatile memory using nanocrystal wires as small as 5 nanometers wide that can make chips five times more dense than the 27 nanometer NAND flash memory being manufactured today. And, the memory is cheap because it uses silicon and not more expensive graphite as been used in previous iterations of the nanowire technology. The nanowires also allow stacking of layers to create 3-D memory, even more dense. 'The fact that they can do this in 3D makes makes it highly scalable. We've got memory that's made out of dirt-cheap material and it works,' a university spokesman said."
When we run out of possibilities in shrinking the process we go vertical and take advantage of the third dimension. Moore's law is safe for a good long time.
This tech is still several years out from production but other 3D silicon options are in testing, and some are in production.
When the Z density matches the X and Y density in fifteen years or so we'll be ready for optical or quantum tech.
Help stamp out iliturcy.
Nope, no one saw that one coming.
"To those who are overly cautious, everything is impossible. "
All we ever see is a drop in the price of USB sticks in the shop, but under the surface the duck is paddling as hard as ever.
http://michaelsmith.id.au
how many do we ever actually purchase?
Some. Is that not enough to make it newsworthy?
"Dirt cheap" isn't here to stay.
Their technology requires polycrystalline silicon & the demand is increasing much faster than the supply.
China might build more polysilicon factories, but they'll undoubtedly reserve the output for their own uses.
This isn't a new problem, since mfgs have been complaining about shortages since 2006-ish (IIRC).
[Fuck Beta]
o0t!
Great, it's denser. Does this mean it now comes in a yellow-white, almost blonde color?
There's a spot in User Info for World of Warcraft account names? Really?
All of the tech we actually purchase comes out of tech published in articles like this one. Processor process technologies, bus evolutions, memory architectures, advancements in lithography are printed here and wind up in the products you buy. Not all of the articles are successful technologies but all of the successful technologies have articles and the time reading about the failures are the price we pay to know about such things in advance. Most of us don't mind, because there are lessons in failures too. Did you read the top of the page where it says "News for nerds."? Are you lost?
Digg is over here.
Help stamp out iliturcy.
If a single dimension changes, assuming the NAND cell structure is similar, there would be a 5x reduction in size in each of the X and Y dimensions. Therefore, you would get up to 25x more density than a current NAND. This is why process technologies roughly target the smallest drawn dimension to progressively double gate density every generation (i.e. 45nm has 2x more cells than 32nm).
The big question I have for all of these technologies is whether or not is is mass production worthy and reliable over a normal usage life.
Shh. One mustn't identify in public The Great Duck, herald and bringer of technology.
Best Buy and Amazon are both selling Intel's 40 GB flash drive for just under $100 this week... I'm building a server based around it and will likely later post on how that goes. Intel recently announced that they're upping the sizes so you're likely going to see the 40 GB model in the clearance bin soon.
It's here, it's ready... and when you don't have a TB of data to store they're a great choice, especially when you read much more often that you write.
And if you do need a big SSD Kingston has had a laptop 512GB SSD out since May with huge performance, and this month Toshiba and Samsung will both step up to compete and bring the price down. We're getting close to retiring mechanical media in the first tier. Intel's research shows failure rates of SSD at 10% that of mechanical media. Google will probably have a whitepaper out in the next six months on this issue too.
This is essential because for server consolidation and VDI the storage bottleneck has become an impassable gate with spinning media. These SSDs are being used in shared storage devices (SANs) to deliver the IOPs required to solve this problem. Because incumbent vendors make millions from each of their racks-of-disks SANs, they're not about to migrate to inexpensive SSD, so you'll see SAN products from startups take the field here. The surest way to get your startup bought by an old-school SAN vendor for $Billions is to put a custom derivative of OpenFiler on a dense rack of these SSDs and dish it up as block storage over the user's choice of FC, iSCSI or Infiniband as well as NFS and SAMBA file based storage. To get the best bang for the buck, adapt the BackBlaze box for SFF SSD drives. Remember to architect for differences in drive bandwidths or you'll build in bottlenecks that will be hard to overcome later and drive business to your competitors with more forethought. Hint: When you're striping in a Commit-on-Write log-based storage architecture it's OK to oversubscribe individual drive bandwiths in your fanout to a certain multiple because the blocking issue is latency, not bandwidth. For extra credit, implement deduplication and back the SSD storage with supercapacitors and/or an immense battery powered write cache RAM for nearly instantaneous reliable write commits.
I should probably file for a patent on that, but I won't. If you want to then let me suggest "aggregation of common architectures to create synergistic fusion catalysts for progress" as a working title.
That leaves the network bandwidth problem to solve, but I guess I can leave that for another post.
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One thing you could run in to are heat issues. Remember that high performance chips tend to give off a lot of heat. Memory isn't as bad, but it still warms up. Start stacking layers on top of each other and it could be a problem.
Who knows? We may be in for a slowing down of transistor count growth rate. That may not mean a slow down in performance, perhaps other materials or processes will allow for speed increases. While lightspeed is a limit, that doesn't mean parts of a CPU couldn't run very fast.
Also it may slow down. Exponential growth doesn't last for ever. We may start to hit the limits of what we can do.
Have to see.
Nope. Microsoft is that stupid dog that keeps laughing at you when you can't shoot the ducks.
Some supercapacitors have made it to market and refinements on lithium technologies have come a long way in the last decade, tripling the maximum storage density available. The problem is our demand for portable power has outstripped that growth (my blackberry is significantly more powerful than my desktop from 10 years ago and talks 6 different wireless protocols).
There are 4 boxes to use in the defense of liberty: soap, ballot, jury, ammo. Use in that order. Starting now.
The radius of a silicon atom is 111 to 210 picometers, depending on the measurement context. (Check Wikipedia to see what I mean.) That means 5nm is somewhere between 23 and 45 silicon atoms wide.
If so, count me out! Besides 3D makes me nauseated.
What one fool can do, another can. (Ancient Simian Proverb)
I'm still waiting for some cheap, stable, high density ROM or preferably WORM/PROM. Even flash has only about 20 years retention with the power off. Which sounds like a lot, but it's not all that difficult to find a working synthesizer or drum machine from the mid-80s in working condition. But if you put flash in everything your favorite devices may be dead in 20 years. for most devices this is OK. But what if some of us want to build something a little more permanent? Like an art piece, a space probe, a DSP based guitar effects pedal, or a car?
Some kind of device with some nano wires that I can fuse to a plate or something with voltage would be nice if it could be made in a density of at least 256Mbit (just an arbitrary number I picked). EPROMs (with the little UV window) also only last for about 10-20 years (and a PROM is just an EPROM without a window). So we should expect to already have this digital decay problem in older electronics. Luckily for high volumes it was cheaper to use a mask ROM than a PROM or EPROM. But these days NAND flash(MLC) is so cheap and high density that mask ROMs seem like a thing of the past, to the point that it is difficult to find a place that can do mask ROMs that can also do high density wafers.
“Common sense is not so common.” — Voltaire
Silicon-based lifeforms 5x denser than carbon-based.
Cache is not a case where more is necessary. What you discover is it is something of a logarithmic function in terms of amount of cache vs performance. On that scale, 100% would be the speed you would achieve if all RAM were cache speed, 0% is RAM only speed. With current designs, you get in the 95%+ range. Adding more gains you little.
Now not everything works quite the same. Servers often need more cache for ideal performance so you'll find some server chips have more. In systems with a lot of physical CPUs, more cache can be important too so you see more on some of the heavy hitting CPUs like Power and Itanium.
At any rate you discover that the chip makers are reasonably good with the tradeoff in terms of cache and other die uses and this is demonstrable because with normal workloads, CPUs are not memory starved. If the CPU was continually waiting on data it would have to work below peak capacity.
In fact you can see this well with the Core i7s. There are two different kinds, the 800s and the 900s and they run on different boards, with different memory setups. The 900s feature faster memory by a good bit. However, for most consumer workloads, you see no performance difference with equal clocks. What that means is that the cache is being kept full by the RAM, despite the slower speed, and the CPU isn't waiting. On some pro stuff you do find that the increased memory bandwidth helps, the 800s are getting bandwidth starved. More cache could also possibly fix that problem, but perhaps not as well.
Bigger caches are fine, but only if there's a performance improvement. No matter how small transistors get, space on a CPU will always be precious. You can always do something else with them other than memory, if it isn't useful.