Marvell Launches First Triple-Core Hybrid ARM Chip
Blacklaw passes along an excerpt from Thing.co.uk that begins "While other manufacturers are content to develop dual-core ARM processors, Marvell has gone one better — literally — with a new triple-core chip called the Armada 628. The system-on-chip design, based on ARM's v7 MP series, features two dedicated 1.5GHz processing cores plus a third 624MHz core in a single application processor — making Marvell the first company to bring such a beast to market. While two of the cores are a pretty standard SMP setup, as seen in other dual-core ARM implementations, the third is a standalone processor designed for ultra-low-power draw. The idea behind such a design is that when the system is idle, or only running a low-performance application on a single thread, it can shut off the dual-core portion and save oodles of power."
Why can't it just shut down one of the two normal cores, and run the other core at a highly reduced rate to get the same power savings? Additionally, I've seen plenty of benchmarks where a higher-power draw chip that can get done with a task quickly and drop back to low-power idle mode is actually more energy efficient than a lower-power chip that takes longer to get the task done. What sort of tasks is the third core intended to do that it would be so much more efficient than a regular ARM core?
AntiFA: An abbreviation for Anti First Amendment.
Does it run on DC?
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Beowulf Cluster of...... Never Mind......
Reminds me of This old chestnut from the Onion.
No, Marvell.
There's a tendency to put a little CPU in devices to handle activity when the device is "off". Something has to sit there and watch for the remote if the TV is to be turned on remotely. Many machines have a "wake on LAN" capability, and most servers have an extensive remote management capability built into the network controller. All of these imply some little CPU, invisible to the main operating system, doing things when the device is supposedly "off".
This isn't necessarily a bad thing, but it does provide an attack surface. Especially since those little machines tend to have very powerful access to the rest of the system, bypassing most security measures.
This new chip looks like an effort to integrate the "power off" CPU onto the same silicon as the main CPUs. That's a routine use of silicon real estate by putting more on one part. But the concept isn't new.
At current processes (44nm, 32nm, etc.), switching power isn't critical at low speeds, it's leakage that is the issue. So a fast (big) processor takes a fair amount of power even if you run it slow.
Whereas a slow core is smaller, so that means fewer transistors to leak. You also can make the gates out of lower-leakage cells, so that even when on they leak less. This limits top speed which would be a problem for the main core but isn't a problem for this non-main core.
Having additional low-power cores isn't that strange, many current phone SOCs do this. What is unusual is most of those have one main core and many slower ones and this one has two main cores and one slower one.
http://lkml.org/lkml/2005/8/20/95
Well, there are agreements which prohibits the use of Multiple Independent RISC Vehicles in your devices.
Though i guess you're fine as long as the russians don't find out.
It's common for people (myself included) to conflate Energy with Power, but it's often an important distinction. To begin with, technically, we don't consume power. We consume energy (to do work, which is in the same units), and power is the rate at which it is consumed.
An important factor often left on the floor is processing efficiency, meaning how fast are we getting work done for a given power level. If you reduce power by half, but the work takes twice as long, you've accomplished nothing. For the same amount of work, your battery will drain the same amount. Indeed, what we really want to do here is make systems take less energy, and within reasonable limits, it doesn't matter how much power you consume while you're doing it.
This has actually been one of the things that makes ARM processors energy-efficient. Not to say they're not also low power, the strategy has always been to build event-driven systems. Something happens (user input, sensor reading, etc.), which causes the CPU to wake up in your embedded system. The ARM processor then blasts through the work to be done, and then goes to sleep, powering down completely until the next event. (Some systems will use intermediate "sleep" states that are less time-expensive to sleep and wake.) An ARM is more efficient than an Atom, in part because it uses less power, but also in part becauses it needs less time to complete the same task.
In today's technology, this is especially important. At 90nm and 65nm, the Intel Core and Core 2 used clock gating to save power. Functional units (e.g. floating point multiply) that are idle have their clock signals gated, which reduces power being used by that part of the clock distribution tree. This is important because in those technologies, dynamic (switching) power dominates. In the Core i7, Intel uses POWER gating. When a functional unit is idle, it's powered down completely. This is because in 45nm and 32nm CMOS, static (leakage) power is what dominates.
Going back to ARM, this is something being applied in the Cortex A9. They've made a more complex processor in order to execute out of order, but as a result, computation goes appreciably faster. During computation, leakage is constant. By getting the work done faster and powering down completely, more leakage power is saved. Less time translates into less energy, even if the A9 uses more power than the A8.
I think we're tripping up over the reporter's choice of language here. From Marvell's actual press release:
The tri-core design integrates two high performance symmetric multiprocessing cores and a third core optimized for ultra low-power. The third core is designed to support routine user tasks and acts as a system management processor to monitor and dynamically scale power and performance.
Depending on what their definition of "routine user tasks" might be, it sounds like it doesn't actually shut off both cores and run exclusively off the third core, the way TFA makes it sound -- it only does that if the device isn't doing anything. More interesting stuff:
Marvell's ARMADA 628 tri-core CPU comprises a complete SoC design – a first for the industry. In addition to the tri-core CPU, there are six additional processing engines to support stunning 3D graphics, 1080p video encode/decode, ultra high fidelity audio, advanced cryptography, and digital photo data processing – for a total of nine dedicated core functions.
This sounds like a pretty cool chip.
Breakfast served all day!
ARM is very good at confusing numbering schemes. There are basically two separate numbers: the architecture version and the cpu model number. The ARMv7 (note the *v*) in the article is about the architecture version (ARMv7 is currently the latest version), while the ARM9 you are talking about is a core that implements the ARMv5 instruction set. See http://en.wikipedia.org/wiki/ARM_architecture#ARM_cores for a list of ARM cores and the corresponding architecture version they implement.
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Oh come on, that was FUNNY, not OFFTOPIC.
Attention uninformed moderator: DC and Marvel are both comic book publishers. In fact have for decades been rival companies and each "universe" is known for certain superheroes. On the DC side you have Superman, Batman, Wonder Woman, Teen Titans, and so on. The Marvel universe features The Amazing Spider Man, X Men, Fantastic Four, Daredevil, Iron Man, and so on. Heck, with all the comic book-based movies over the last 20 years, even women know about comic books, and not just the geeky ones among us.
In other words, parent post was a topical JOKE (NOT OFFTOPIC), and you should instead focus on modding "insightful" and "informative" posts UP rather than modding posts you disagree with or jokes you don't get "down". In other words, follow the moderation guidelines - and consider developing your sense of humor while you're at it.
HTH!
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