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The Ancient Computers Powering the Space Race
An anonymous reader writes "Think that the exploration of space is a high tech business? Technology dating back to the Apollo moon landings is still used by Nasa mission control for comms and the 1980s 386 processors that keep the International Space Station aloft."
I read a while ago that for space use the older integrated circuits are many times more reliable. On a new high density IC a cosmic ray can knock out a connection track, whereas on older "8-bit" processors you would need thirty or forty hits in the same place.
Those "ancient" 386 chips are probably mil-spec radiation hardened chips, too. Good luck getting your 45nm quad cores to work reliably in space...
No sig today...
And the B-2 Stealth bomber has the equivalent of an Amiga 1000 running it. What is the point of this article? Critical systems require reliable, proven, hardened hardware, not flakey netbooks.
If they are not the fastest CPUs, who cares? They aren't playing half-life on these systems they are flying space shuttles, and if you can't tell the difference, do not work in the defense or space industries. CPU speed isn't the prevailing factor here, reliablility and a known/proven system is.
If telephones are outlawed, then only outlaws will have telephones.
I forget which sci fi author it was, but there is a book where one of the main characters is hired to analyze code of a failing satelite. And he says "Perhaps the cleanest most boring software he had ever seen, virtually bug free, and what bugs there were had 3000 pages of documentation."
The Revolution Will Not Be Televised
My first engineering job out of college was as an avionics engineer at McDonnell Douglas in 1996. We were designing avionics using a Highly Reliable Industrial (HRIP) M68000 CPU downclocked to a couple of MHz. The reason for this CPU choice was that it did exactly what was required for building an embedded system. Also the M68000 had/has a very long production cycle and would be around for many years to come, which is important if you need spare parts in the future. We used the minimum clock setting required to achieve the required performance and to reduce power consumption and thermal cooling requirements. Modern general-purpose desktop CPUs normally aren't good choices for single-task embedded systems because of their power consumption, short product life spans, and general feature overkill. You do not need a particularly fast CPU to perform basic guidance and control tasks or to run avionics computers. The PowerPC has been adapted for imbedded MILSPEC systems for example and it's about 10 years behind the "state of the art."
Yes, a lot of NASA's computer systems are antiquated ...
Furthermore, I thought the United States was still a bit stymied at how the Russians managed to compete with us in space while severely lacking in the VLSI chips department? There may still be some technologies, improvements and lessons to be learned from The Space Race -- especially from the side that fell apart first.
My work here is dung.
See that glowing thing in front of you? The thing you're reading this on? It's just like little pictures of cats and pyramids scratched onto stone tablets, only we fixed it.
If you were blocking sigs, you wouldn't have to read this.
Those "ancient" 386 chips are probably mil-spec radiation hardened chips, too. Good luck getting your 45nm quad cores to work reliably in space...
They certainly are mil-spec. Intersil is still doing wafer runs of Silicon-on-Sapphire rad-hard 386s at their fab in Palm Bay, FL. I got to tour the fab during a job interview. Regarding the 45nm cores, they are probably quite radiation tolerant. Smaller feature size transistors have much smaller oxide thickness so it is much, much, easier for ions caught in the oxide due to radiation to tunnel away. So, total dose ceases to be a problem. The Single-Event-Upset (SEU) becomes a big problem though because embedded RAMs are not as robust (much lower noise margins with reduced power supplies) but that is usually dealt with using redundancy and a design style that doesn't allow dynamic logic or flip-flops.
High-performance circuits *are* used in space. There is some kick-ass stuff being designed at Northrup Grumman Space Technology, for example. It just isn't used in manned missions due to the incredible liability.
While the article is quite right to highlight the proven, reliable technology in manned space missions, it is a mistake to infer that all space electronics technology used today is from the 70s and 80s. There is a vibrant design community for space electronics and a lot of quite whiz-bang stuff goes up in comms, scientific and recon sats. Someone mentioned the space industry hasn't dominated the electronics business for 40 years. That's true, but there are still niches that are absolutely dominated by space. For example, there are some incredibly high-performance millimeter-wave circuits, amazingly sensitive photodetectors and bolometers, and extremely fast Indium-Phosphide digital circuits (not full-on processors) going up in missions every year. Modern CMOS technology (deep submicron) is inherently radiation-tolerant, so rad hardening isn't as important commercially as it used to be, because there is an acceptable level of risk. Manned missions have a MUCH lower acceptable level of risk so mission planners are loathe to deploy anything new.
Largely this is a function of geometry. The smaller gates required for higher speed operation are also vastly more sensitive to imparted charge from ionizing radiation. Large slow chips are inherently more robust, so when you do things like Si on sapphire you get a lot of bang for your buck.
I don't doubt that a fast core could be RAD hardened, but the current generation of Core2 arch and ix arch from Intel/AMD/IBM are virtually impossible to make into a rad hardened build. You really would need to do a redesign with things like ECC registers and the demand for such chips is so low as to not be a profitable endeavor for any of the main players. Demand is satisfied by the RAD600/750 families (PowerPC 750 / Apple G3), so why invest gobs of money into R&D for a product that has little to no demand?
-nB
whois gawk date unzip strip find touch finger mount join nice man top fsck grep eject more yes exit umount sleep dump
Based on geometry alone, no.
However I think a Cortex series core would be vastly easier to re-implement with double bit error ECC Parity.
If I were a Rocket Chip Designer:
Cortex A6 redesign:
2 ALUs with parity checks on output, run combinationally. Any parity errors, re-run calculations.
All register memory is ECC capable of detecting 2 bit errors and correcting single bit errors.
similar over designing on all other functions in the die.
Dual instruction caches, again parity checked.
Built as Si on sapphire.
increase geometyr of gates to > 90nM (likely 130nM).
Adjustable clock gating so the thing can be clocked as slow as possible for a given job.
Realistically though, that will cost a lot of money. You can get a RAD750 running at about 600MHz for $200,000 already.
whois gawk date unzip strip find touch finger mount join nice man top fsck grep eject more yes exit umount sleep dump
Damn right - I'd rather be using a chip that has a 20-year errata and proven silicon revision than ANYTHING produced in the last five years. Every single processor ever made has errata and when you're talking about a sole life support for the astronauts, damn right it should be from the "old, tried, tested, we know all it's quirks" bin than the local Intel shop.
People never understand this, and I can't understand why. If you tell me that my car's airbags runs on a Dual-core processor, I will be extremely worried for several reasons (unnecessary amount of state-of-the-art technology, unnecessary complications with timing, unnecessary amount of power to do a simple job, etc.) but tell me that it uses a Pentium with an FDIV bug, or even a Z80 with uncorrected "Z80A" original silicon and I'll feel as safe as houses.
Bugs take a while to find. Every extra transistor makes bugs more likely. Every day in ordinary production use makes bugs less likely (because you'll experience them and work around them). And if you NEED 2GHz of processor to do some of these tasks, the astronauts are stuff if their machine ever breaks. If you keep things simple, so that you CAN go to human/paper backup like some of the moon missions did, then you have much less to worry about. Plus the cost is cheaper of course.
It worries me EVERY time I see some modern, state-of-the-art revamp of a critical system (air-traffic control, road traffic signalling, in-car braking systems, etc.)
OK, later ones aren't exactly non-deterministic, but the 386 was the last of the straightforward microprocessors, that simply executed one instruction aftr another. No microcode, out-of-order execution, crazy on-chip L2/L3 caches, etc.
Wonder if that leads to easier "verification" at a very low level, if NASA cares about that...