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Intel Launches Atom CPU With Integrated FPGA
An anonymous reader writes "Intel is quite clearly serious about offering competition to ARM in the embedded market, and has just announced a new Atom processor series that offers a unique selling point: an integral FPGA processor. Billed as 'the first configurable Intel Atom-based processor,' the Atom E600C series combines an Intel Atom 'Tunnel Creek' chip with an Altera Field Programmable Gate Array — offering, the company claims, significantly more flexibility for ODMs and OEMs."
Assuming it's priced relatively reasonably, that is fucking awesome.
If only I'd had a FPGA! (
I seem to recall Xilinx offering a FPGA with an embedded PowerPC core 8-ish years ago. Or maybe it was four cores, I heard it from a co-worker.
Seemed like a fun part to hack around with. Too bad we never got to use any.
I would say x86 fails before it uses too much power per unit of processoring power.
I'm kinda excited for whatever this means. Could somebody please explain? Does this mean Atom processors might be useful now?
In related news, and also very interesting: http://www.eetimes.com/electronics-news/4210263/Intel-to-fab-FPGAs-for-startup-Achronix
yay!
If you care about power, you make an ASIC. An FPGA is all about being cheap and getting to market. FPGAs burn power and don't even clock fast.
I just hope not, OEMs could easily avoid you to reprogram the FPGA.
My other signature is a car
Virtex-II Pro, Virtex-4, and Virtex-5 offered devices with 0, 1, or 2 PowerPC cores. Xilinx once showed die floorplans of Virtex-II Pros with 4 PowerPC cores but if I recall correctly they never shipped such devices.
http://edc.intel.com/Link.aspx?id=3961
350 user I/O pins. I think that could control a few Christmas lights. Or make a nifty message-passing bus for a parallel computer.
Wonder if anyone will make inexpensive boards with breakout IO?
Many Virtex-II Pro, Virtex-4, and Virtex-5 don't have PowerPC cores. No Virtex-6 or later device does.
Altera used to have FPGAs with an embedded ARM core + support "stripe" (Excalibur, early 2000s) -- e.g. Altera Excalibur EPXA10.
Of course Xilinx has announced a family of 7 series FPGAs with ARM Cortex-A9MPCore cores. http://www.xilinx.com/technology/roadmap/processing-platform.htm
Both Xilinx and Altera also have in-house soft-processor cores and infrastructure, and ecosystems of third-party soft processor cores.
The right way to do this license the Altera IP and integrate it closely with the CPU. Then the CPU could use it in normal operation, for floating point for example. You have various programs and every time you try to access one that's not in the FPGA an interrupt is generated.
Almost like in the good old days of WCS.
thegodmovie.com - watch it
The obvious solution is to put an ARM processor in the FPGA.
Excuse me, but please get off my Pennisetum Clandestinum, eh!
Before you all speculate widely, try reviewing the actual product brief. http://download.intel.com/embedded/processors/prodbrief/324535.pdf . In which you will see this is an MCM with an Atom E6xx SoC die and an Altera FPGA die, interconnected by 1-2 PCIe x1 links. It has an amazing 1466 ball grid array package.
It's not clear to me what this level of packaging and integration achieves compared to mounting a (not integrated) E6xx BGA and a separate Altera or Xilinx FPGA BGA onto the main PCB, interconnected by PCIe x1 or perhaps even x4. Then you would get a broader choice of FPGAs -- and perhaps a simpler PCB escape for the two packages compared to one 1466 ball beast.
The advantages of this MCM as stated in the brief include:
* reduced board footprint
* lower component count
* simplified inventory control / manufacturing
* single-vendor support
True, but forgive me if I'm not over the moon. The dream of integrated FPGA fabric into a heterogeneous SoC (same die) includes a very low latency and possibly cache coherent interconect between the processor(s) and the FPGA. But here the FPGA is on the other side of a narrow PCIe link. It can't share the Atom SoC's memory hierarchy / DRAM channels very effectively. It is probably a very long latency round trip from x86 software control / registers and L1$ data, to some registers or function units in the FPGA, and back to the x86. So I think of this as more of a super-flexible Atom SoC platform than a dream reconfigurable computing platform.
It's a nice step but I look forward to so much more.
http://www.fpgacpu.org/usenet/fpgas_as_pc_coprocessors.html (1996): "... So as long as FPGAs are attached on relatively glacially slow I/O buses ..."
-- including 32-bit 33 MHz PCI -- it seems unlikely they will be of much use in general purpose PC processor acceleration.
I am hoping that the software needed to program the FPGA portion of the chip is available and that the FPGA itself is programmable by the end user. This would be a big leap in the kinds of projects that can be attempted by homebrew dudes and the like.
Done: Altera Excalibur EPXA10
In progress: http://www.xilinx.com/technology/roadmap/processing-platform.htm
Well, at least she didn't try to make you listen to her.
which is totally what she said
What?
Articles (found freely on Google) like "Evolving FPGA-based robot controllers using an evolutionary algorithm." by Renato A. Krohling, Yuchao Zhou, and Andy M. Tyrrell is a dream!!!
Genetic algorithms and FPGA is way cool!
As has been pointed out, the FPGA isn't tightly coupled architecturally-wise enough to provide a performance gain in tightly coupled software. This solution, like any board with an FPGA, works best when the task allocated to it is relatively stand-alone (some intensive DSP, etc). Now what would be interesting in this field is cloud providers making FPGAs available as part of their packages, or even using them themselves. So many web applications grind the server for image processing, that would be well suited to an FPGA. Maybe Google should consider it for GAE, for example?
"Therein lies the rub, of course: there's nothing to stop customers licensing one of ARM's chip designs and combining it with an FPGA themselves, but it means dealing with two companies - and Intel is obviously betting heavily on there being a sizable quantity of ODMs and OEMs that would prefer to work with a single firm."
What a beautiful lie. Like the leading FPGA manufacturer haven't done it yet - http://www.xilinx.com/technology/roadmap/processing-platform.htm
During that period, Mrs Palin sexually abused me
Ah yes. Contrary to popular belief, some females are especially prone to bouts of arousal during their period.
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Shush AC, there there, don't let the scary electronics frighten you...
I love programming and wiring up some microcontrollers as much as the next geek, but at what point does a chip become too complex for realistic home use?
I don't need hundreds of GPIO pins, and I don't even think I can solder detailed enough or design home-made PCB with enough detail to accommodate a processor with this many pins and features.
I am pretty happy to see FPGAs making it into commercial projects - they're just so useful.
"You want your processor to use this specific logic pipeline? There's a chip for that!"
If the only way you can accept an assertion is by faith, then you are conceding that it can't be taken on its own merits
There are loads of FPGAs on the market with integrated PowerPC cores. There are probably FPGAs on the market with integrated ARM cores (ah yes, a post already links to one such creation). This is a dual-die package with a 60k gate FPGA. It's a nice option on the market, but it's hardly unique. The cost will be a major issue as well, although so far the prices look reasonable. But you can't put much into 60,000 gates (although maybe they're counted different from Xilinx or Spartan gates), certainly not a Minimig AGA core.
So enjoy your 600MHz Atom + FPGA. Or 1GHz. Or 1.3GHz. WIth enough FPGA to implement a C64. Yeah, I know that in industry it will be used for different purposes, but will that industry care about x86 compatibility ... or continue using the existing PowerPC and ARM options?
The article says the Atom CPU/FPGA combo is unique. It is not at all unique -- the Actel SmartFusion processor combines a hard ARM and FPGA. This processor has been available for at least a year. I have several prototyping boards with the processor. The combination of a hard processor with the FPGA is a killer combination. There are too many uses to list here.
If it's fast enough you could use it as an SSL front end to non-SSL web servers.
There are places where the networks are not touching,and there are places where they are-Boeing's Lori Gunter
Anyone know what size FPGA will be there? Now obviously it will be a semi-custom design, but if it's something along the lines of a cyclone 2, there ain't THAT much to gain...
Now if it's more like a big stratix I'm not saying... ×D
Great. Now when you get a virus, it'll be able to reprogram your *hardware*. I'm sure that couldn't go horribly wrong at all...
-Never argue with an idiot. They drag you down to their level, then beat you with experience-
Can I run Linux and Eclipse on one of these new CPUs locally, and use a good Eclipse module to port Linux kernel functions (like IO logic) from iterated procedures to the FPGA, then test them? Which Eclipse modules would support that development?
--
make install -not war
Xilinx this year introduced a whole new architecture embedding an ARM Cortex A-9 in a large FPGA, designed to run primarily as the CPU, including FPGA functions as the developer specifies through software.
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make install -not war
So you're saying she opened her gates while you were reconfiguring her but she didn't FPGAd in your mouth? Perhaps you didn't do it in a sufficiently atomic way?
The largest I have seen has two PowerPC 440 cores. That would be the Virtex-5 FX130T and FX200T (Only different in the number of logic gates available).
None of the current V6s do, but I keep hearing about Xilinx going to ARM. It is in one of their roadmap documents but no real info on exactly where in the roadmap it is.
Unlike Intel's solution, the Xilinx units have everything on a single silicon die.
retrorocket.o not found, launch anyway?
Xilinx Extensible Processing Platform parts are supposedly manufactured, and planned for sale in early 2011. I've been hearing about their progress for over a year from a friend who's a top Xilinx engineer.
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make install -not war
It would let viruses create some custom FPGA code that would be able to crack any encrypted files you had in mere seconds, instead of hours.
"There is more worth loving than we have strength to love." - Brian Jay Stanley
Please please PLEASE leave this open for hobbyists to download their own FPGA code. I could REALLY use a dedicated FFT or DSP for math crunching!
Browsing at +1 - no ACs, I ignore their posts. So refreshing!
The largest I have seen has two PowerPC 440 cores. That would be the Virtex-5 FX130T and FX200T (Only different in the number of logic gates available).
None of the current V6s do, but I keep hearing about Xilinx going to ARM. It is in one of their roadmap documents but no real info on exactly where in the roadmap it is.
Unlike Intel's solution, the Xilinx units have everything on a single silicon die.
And my God, the tools SUCK.
While I am a 15 year veteran programmer I am only familiar with the concept an FPGA and have never looked at using one. How does this work in practice?
Can I interleave new opcodes I created for the FPGA like this:
intel opcode
fpga opcode
intel opcode
Or do I have to create a buffer, pass it to a special spot in memory, use a special intel instruction to trigger the FPGA, the FPGA works on it for a while, then it switches back to X86 mode?
Whether that's relatively reasonable depends a lot on what you're trying to do. For a netbook, probably not realistic. For a specialized machine where the FPGA enables something hard to do in a vanilla CPU, maybe. Maybe you can use the FPGA to do graphics processing more cost-effectively than a separate nVidia chip, or do good enough graphics while keeping the power consumption down, or do fancy geometry crunching for a game machine. Who knows?
Bill Stewart
New Fast-Compression-only CPR http://preview.tinyurl.com/dy575ks
They do suck, but you get used to the ways they suck after a while. For example, I found it hard to move to a different synthesis tool from XST, because the other ones lacked some nice little convenience features of XST, despite the better RTL-level synthesis of the alternative tools.
I'm sure I'd be driven batty if I ever tried to use an Altera FPGA, simply because some of the features I'm used to will not be there, even though the features are emphatically non-essential.
My mental model of an FPGA is also based heavily on the Virtex and Spartan designs, and it would take some work to adjust them.
Stylish sheet to fix many problems in Slashdot's D3: https://gist.github.com/801524
Neither. FPGAs don't work by opcodes, or anything remotely similar.
While it is possible to have a CPU design where additional CPU Opcodes can be added by the FPGA, and they would work just like any other opcode[1], but this is not such a design. The design here is a standard Atom CPU, connected to the FPGA by a a 1x PCIE bus. The FPGA could be configured to act like any possible PCIE component, with internal digital logic, and using the GPIO pins to interface with something else you (the PCB designer) put on the motherboard.
Footnote:
[1] Practical implementations of such a system may have the new opcodes take more cycles than a native opcode, as the CPU's clock speed may be to great for the FPGA, but you may well be able to have the new opcode take 10 clock cycles, or so, to perform some function that would normally take 100 operations or more.
What would be possible in such a system would very much be dependent on the design of the platform. A platform that exposes only the ALU stage of the pipeline would only work particularly well for new esoteric arithmetic operations, but one could still put registers in there allowing for more complex sets of additional instructions. However if hooks into more of the CPU are exposed, then the new opcodes could potentially be more efficent, or add interesting features like virtualization extensions, and so on.
Stylish sheet to fix many problems in Slashdot's D3: https://gist.github.com/801524
I thought the FPGA was an organization of cats who play golf.