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Cheaper, More Powerful Alternative To FPGAs
holy_calamity writes "Technology Review takes a look at a competitor to FPGAs claimed to be significantly faster and cheaper. Startup Tabula recently picked up another $108m in funding and says their chips make it economic to ship products with reconfigurable hardware, enabling novel upgrade strategies that include hardware as well as software."
Yup. Especially write-once FPGAs.
Sometimes making an FPGA is cheaper than building an equivalent board. You can get preprogrammed cells for entire microprocessors now. And lots of other library cells. Build an entire custom computer into a single package, if you want.
It's not dirt-cheap, but it's easy, and saves an assload on inventory.
See Fractal antenna no multiple antenna's needed. The receiver part is a different story.
All of our product have some sort of reprogrammable logic. PLD , GAL , EPLD, CPLD , FPGA, and some the designers should have been shot for making.
Without it we would not be able to design a product and get it to market with any hope of turning a profit. It keeps engineering costs low allows us to make changes for regulatory requirements and allows end users to load new firmware and fix problems in the field.
Some of our products are niche and low volume and some of our products are very high volume and we're growing.
I'd go on a Vegan diet but the delivery time from Vega is too long. --brownkitty
Link to a better writeup, one that doesn't attempt strained architectural analogies (ignore the first paragraph or three, but do look at the comments).
Here's the thing people don't seem to realize: FPGAs *are* cheap.
Case in point: Xilinx XC3S50A. $5.75 at Avnet. Comes in a hobby-solderable VQFP and you can make it work on a 2-layer board. Add a SPI flash to boot from (or a nearby micro with ~50K of spare flash), an oscillator, and +3.3V/1.2V regulators for power and you're still under 10 bucks parts cost - in low quantity.
This chip is only bottom of the line, but it's full of awesome stuff - "DCM" clock multipliers that can let you run FPGA designs at 250+ MHz by multiplying up slow external clocks, three 18x18 multipliers that run at almost the same speed, three 2Kbyte SRAM blocks that you can use as instruction/data memory for processors (eg, a Picoblaze, which can run at 100+ MHz).
These are great little things to play with as a hobbyist. I've contemplated making an Arduino shield with a small, cheap FPGA for people to experiment with, but I never really could figure out any good way to get data and signals in and out of the chip in a way that shows off what FPGAs are really good at.
Plenty of tools like oscilloscopes now use FPGA's. Low end FPGA's are a couple of dollars tops, which is cheaper then the purchase plus production costs for a bunch of discrete chips.
A lot of hobbyist producers make designs with those low end FPGA's because it can be cheaper to use one FPGA over a whole bunch of products rather then stocking equivalent discrete IC's (ie you can buy an FPGA in 1000 quantities and use it across 10 products).
Of course this new product is just a cheaper FPGA, and their marketing claims are bullshit. Consumer electronics producers do not want upgradeable or repairable electronics. They want to be in the "fashion" business like Apple and sell new "upgrades" every year.
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CINC, 4th Penguin Legion
...but it has fast context switching built-in. And you can't control when the contexts switch, they always go in order (as they should, since they're all statically assigned, and are different parts of a single problem, rather than separate problems).
For those that don't know how FPGAs work, here's a basic crash course: they have lots of blocks, each one has a look-up table (say a 4-LUT; 4 inputs, 1 output). The LUT is basically a "read-only" RAM with 4 address bits (so 16 addressable locations), and one data bit. The RAM can be rewritten (this is what is done when they program an FPGA), but it's fairly slow. Tabula changes it up a bit so that each addressable location is 8 bits instead of 1 bit. Since transistors are basically free on an FPGA (they're wire-dominated), this doesn't cost much, and it means that they can time-share pieces of silicon for different purposes without the penalty of reprogramming the chip. Then, each cycle, it'll pick a different one of the 8 bits (though the address, or inputs to the 4-LUT, may be changing at the same time).
It's a fairly straightforward idea, though there's a fair amount of complexity added to the design tools.
However, it's not free. You now have lots of high-speed logic, which is probably using tons of power, and it's switching frequently, which is using tons more power, and even when it's not, it's probably fairly leaky, using even more power. Effectively, you have a 1.6 GHz chip, but to you it seems like it's only running at 200 MHz - but it can do ~8 times more processing per silicon area. You might also think of it as being similar to the Pentium 4 integer units; they ran at twice the clock speed of the rest of the chip, so it seemed like there were twice as many of them (so a single IU could do an add in the first half of a core clock cycle, and a subtract in the second, computing two instructions per cycle).
So this chip is basically trading latency for computing power. The more operations you need to do, the slower it will run, because it'll take more of their folds to implement your logic.
ASICs actually got more expensive. The individual ASIC is cheaper now, but the non recurring costs of making a ASIC went up a lot. Smaller process nodes need more masks and more complicated masks.
If your mask set is $2.000.000 and you are going to sell ASICs 10,000 made with it, even if the individual ASIC is free after paying for the masks, you are still at $200 per piece. The $100 FPGA is a better option then and at 10.000 pcs you are going to get a pretty large fpga for $100.
Sure. But the older processes are still available. I haven't looked at pricing for a few years, but IIRC last time I digged into this, $2M was about the right price for preparing masks for 65nm processes. However, if you went for something a few process steps older (e.g. 0.35 or 0.5 micron processes which are still readily available), you'd be looking at somewhere in the region of a hundredth that price. And a 0.35um CMOS ASIC can perform similarly to a 65nm FPGA: on both you'd expect non-trivial designs to operate with clock frequencies in the region of low hundreds of MHz.