Intel Opening Foundry To Third Parties
angry tapir writes "Intel is exploring whether it can branch out as a foundry by opening its chip manufacturing facilities to more third-party customers. Intel has expanded its chip-to-order business by signing up additional customers to take advantage of its 22-nanometer process facilities."
In particular, two FPGA design companies will be using Intel's fabrication plant, and "the unit has more than two customers but others are not disclosing their plans yet."
But AMD could use a good fab.
Just sayin'
deleting the extra space after periods so i can stay relevant, yeah.
Just imagine nVidia makes GPUs at Intel to get a full process node ahead of ATI/AMD. It seems unlikely they'd let AMD use their 22nm process to compete with themselves. OTOH, nVidia is now a competitor as well.
I was wondering if/when Intel would do this, since they are essentially a full process generation ahead of the whole world.
I wonder if Apple's rocky relationship with Samsung could be a motivator. Intel would love some of the iDevice revenue.
Larrabee almost certainly lowered future expectations for discrete graphics chips, fearing that Chipzilla would enter their market. I'm guessing this is the same for the foundry business, scaring away potential investors in TSMC, UMC and GloFo. Huge, huge investment costs that take years to materialize and are extremely time-to-market sensitive, any uncertainty you can add to that is advantage Intel. I very much doubt that anything remotely competing with Intel will ever get their hands on their crown jewels.
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Tabula has some cool tech. Their current chips aren't dense enough for what we wanted to do with them, but at 22nm they might be.
Yeah, there are already lots of higher-performance microcontrollers out there if you're interested. If you really want speed and memory, go for something based on a 32-bit ARM. I see a 64 MHz Cortex-M3 with 1 MB of flash on DigiKey for $11. You can get 256k of flash for under $10.
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The Intel Fin transistor design, the Tri Gate transistor cuts the leakage to a tiny value while keeping up the performance. Big transistors (500nm) have their power consumption when clocked as the device becomes a huge CCD device switching distributed capacitance from power to ground. Power per operation is high. Low K dielectrics, small dimensions, combined cut power in high speed operation. Low leakage cuts power draw in all operations. Going big dimensions to cut leakage, requires higher voltage to cut the transistors off, resulting in higher power use per clock cycle when switched.
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