Intel To Ship Xeon Phi For "Exascale" Computing This Year

MojoKid writes "At the International Supercomputing Conference today, Intel announced that Knights corner, the company's first commercial Many Integrated Core product will ship commercially in 2012. The descendent of the processor formerly known as Larrabee also gets a new brand name — Xeon Phi. The idea behind Intel's new push is that the highly efficient Xeon E5 architecture (eight-core, 32nm Sandy Bridge) fuels the basic x86 cluster, while the Many Integrated Core CPUs that grew out of the failed Larrabee GPU offer unparalleled performance scaling and break new ground. The challenges Intel is trying to surmount are considerable. We've successfully pushed from teraflops to petaflops, but exaflops (or exascale computing) currently demands more processors and power than it's feasible to provide in the next 5-7 years. Intel's MIC is targeted at hammering away at that barrier and create new opportunities for supercomputing deployments."

Comments

This chip is so fast

[Anonymous Coward]

It got me first post.

Re:This chip is so fast

[c0lo]

This chip is so fast

...that Japan or China will not lose the chance to show a bigger dick.
Or... will it be Australia?

Larrabee (redux)

[Auroch]

I'm not sure what the "news" is here - it's larrabee with a die shrink. Doesn't intel do this with their tick-tock strategy on ALL their architectures?

Re:Larrabee (redux)

[raftpeople]

Yes, but this is the first time they've applied the "tick-tock" strategy without actually shipping the product.

Re:Larrabee (redux)

[Auroch]

Yes, but this is the first time they've applied the "tick-tock" strategy without actually shipping the product.

I don't know. I can't cite a single example, but I doubt this is the case. It's probably more like that it's the first time they've applied the "tick-tock" strategy without shipping the product after making a big deal about the un-shipped product.

Re:Larrabee (redux)

[gman003]

It's more of "they're actually RELEASING it".

Larrabee, essentially, was never released. It was demonstrated, and a few were even given/lent to researchers for testing, but it was never used in an actual product.

That's why it's *still* known only by its codename. You don't need a real name until you're actually planning to put it on shelves.

That's why it's "news". It's transitioning from a *fascinating* research project to a real, commercial product.

Re:Larrabee (redux)

[Nemyst]

There's a difference in terms of target. Larrabee was initially supposed to be Intel's first shot at being competitive in the GPU market. This reuses a lot of the tech, but it's more like having a bunch of Xeon processors in a PCI-E slot. It's general purpose, massively parallel computing power, which could make it a sweet spot for things like video transcoding or CGI (as GPU solutions tend to be fairly lossy).

The interesting thing about this is that it could basically transform any desktop computer with a modern motherboard into a mini-supercomputer. With two PCI-E slots you can get over 100 CPU cores, which is rather nice as it's all off-the-shelf hardware (well, aside from the probably ridiculously pricey Xeon Phi boards themselves).

Best HPC news for Linux EVER

[CajunArson]

For all of the anti-Intel FUD that is about to be unleashed because this thing doesn't play games: The MIC system is *LIGHT YEARS* ahead of any other device in this space when it comes to supporting Linux and open source. This thing is not just compatible with Linux... it actually runs a Linux kernel natively. Intel has already released an open source software stack, and while it will take some work there will eventually be full GCC support for the 512-bit SIMD instructions that give this thing its processing oomph.

Driver? THERE IS NO DRIVER.. Ok there is a rather simple driver that's already been submitted to the Linux kernel 100% open source for transferring data back and forth from the card, but it is about a trillion times simpler than the monstrosities that pass for GPU drivers. This is a *co-processor*, not some black-box video card that where you pass off code written in a quasi-standard format to be compiled (!) by a video-card driver.

This thing is already more open-source and Linux friendly than anything made by Nvidia or AMD (and no, dumping partially completed documentation 6 months after the card is released with no real support is *not* the same thing as *freaking running Linux on the board 100% open-source before the product even launches*).

If people on this site were rational they'd be setting off fireworks to celebrate this architecture, but because it doesn't have the name "ARM" or "AMD" on it they idiotically reject it as "closed source" for some reason....

Re:Best HPC news for Linux EVER

[symbolset]

You're projecting. The thing is awesome. I can't wait to get one.

And I wouldn't be so sure it won't be adapted to play games.

Re:Best HPC news for Linux EVER

[s.petry]

What they don't talk about for supercomputing in this article is the interconnect. Because the X86 instruction sets are massive, it generally does not work very well. Piping that many large instructions scales poorly, hell it's hard to get 8 chips on a board let alone having an interconnect bundling 128 or so. This is the advantage that RISC has always had over architecture, and why every supercomputer up to date worth speaking of has used RISC over Intel X86.

I'm going to assume it's just a pipe dream until I see an interconnect that can operate over many CPUs on a X86 platform without choking itself to death. And hell, heavy duty computing requires Linux. I'm sure Balmer tried to work a deal though. Good job Intel!

FYI I have bench marked many solutions for Scientific work (CAE) and Windows is always the worst. Easier to develop Graphics code to see data, not for producing data.

Re:Best HPC news for Linux EVER

[Anonymous Coward]

OSS stuff is here:

http://software.intel.com/en-us/blogs/2012/06/05/knights-corner-open-source-software-stack/

Pretty interesting rig they've got here. At first I was ready to discount it as another shitty "black box co-processor" with a horrible API, but as I see this isn't the case. If Intel is smart they'll make it affordable, because something like this is truly a game changer.

Good lord, I can only imagine what a raytracer could do with that platform, or anything else for that fact. Need to run RAID5 but you don't have a RAID card? No problem, run the XOR calculations on your Phi. Want transparent FS compression and realtime de-duplication? Run that stuff on the Phi. The possibilities are nearly endless here because the card and software stack are totally open.

-AC

Re:Best HPC news for Linux EVER

[the_humeister]

What they don't talk about for supercomputing in this article is the interconnect. Because the X86 instruction sets are massive, it generally does not work very well. Piping that many large instructions scales poorly, hell it's hard to get 8 chips on a board let alone having an interconnect bundling 128 or so. This is the advantage that RISC has always had over architecture, and why every supercomputer up to date worth speaking of has used RISC over Intel X86.

I disagree. Half of the top 10 current supercomputers at top500.org are x86 (some with GPGPU), 4 are IBM POWER, and 1 is SPARC64. Most of them are using Infiniband. Honestly, #4 is x86. Just add more computers and it'll be #1. That's basically how the current #1 got there. It's just a matter of how much money institutions are willing to spend to get there.

Re:Best HPC news for Linux EVER

[Anonymous Coward]

but because it doesn't have the name "ARM" or "AMD" on it they idiotically reject it as "closed source"

Really? C'mon man, leave it at the door.

Re:Best HPC news for Linux EVER

[Kjella]

With all due respect, this seems more similar to barebones shader programming than to the usual issues running OpenGL which is why it's "about a trillion times simpler".

Assembler ~= shader programming ~= Xeon Phi programming
OpenGL ~= Java, C#, C++/Qt, C++/Gtk ~= nothing the stack you talk about does

From what I gather this chip essentially gives you SSE on steroids, it's an alternative to CUDA and OpenCL but nothing else a graphics card does. And while currently the Linux capability is just to get the chip up and running, it doesn't actually use the new instructions unless you write it in assembler:

The changes do not include support for Knights Corner vector instructions and related optimization improvements. GCC for Knights Corner is really only for building the kernel and related tools; it is not for building applications. Using GCC to build an application for Knights Corner will most often result in low performance code due its current inability to vectorize for the new Knights Corner vector instructions. Future changes to give full usage of Knights Corner vector instructions would require work on the GCC vectorizer to utilize those instructionsâ(TM) masking capabilities. This is something that requires a broader discussion in the GCC community than simply changing the code generator.

Re:Best HPC news for Linux EVER

[Kjella]

This is the advantage that RISC has always had over architecture, and why every supercomputer up to date worth speaking of has used RISC over Intel X86.

Well, if you don't feel 87% of the current top500 or half the top 10 aren't worth speaking of then I guess you only see what you want to see. True, the top three are not x86 but they're the bulk of the world's supercomputers.

Re:Best HPC news for Linux EVER

[FithisUX]

Open source is the real diamond here. It gives a new opportunity for *BSDs and Haiku and Solaris. I can't wait to burn some Knights Corners. Even scientific compilers like Pathscale and Open64 can benefit. Go Intel go.

Re:Best HPC news for Linux EVER

[jimmydevice]

Maybe now, But in 6 months or a year, this thing will be on a PCIe card. Intel never forgets mass market.

Re:Best HPC news for Linux EVER

[SuricouRaven]

I've written a nifty inpainter that can do an excellent job of removing TV-channel logos from animation... at about one frame per day. With this thing, I might actually be able to run it!

Re:Best HPC news for Linux EVER

[SuricouRaven]

Want.

Re:Best HPC news for Linux EVER

[Anonymous Coward]

What FUD? Its great that NVIDIA, AMD and ARM have some competition,

We're just confused by Intel. We don't know what stack to develop with TBB, ARBB, OpenMP, Intel MPI, Intel OpenCL, CLIK, ....

It's PCI-e Device so IT HAS A DRIVER ... So don't confuse the issue that adds to any FUD.

Great if Intel have simplified the driver. Lets hope it does NOT have any Session 0 isolation issues on Windows ...

Re:Best HPC news for Linux EVER

[CajunArson]

Uh... so you just admitted that its possible to write assembler for the new SIMD instructions (which are already 100% publicly documented). And if you can write assembler... what else could you do? Maybe... incorporate the new instructions into GCC? It worked for the C programming language! Sure it would take work, but when ARM came out with NEON instructions they were in the exact same boat, and I haven't seen anyone insulting ARM about that. That is MIC's huge advantage in addition to having a very competitive hardware architecture.

You insult these new instructions as just being an expansion on SSE, but guess what: lots of software takes advantage of SSE and the changes required to use MIC would be *trivial* compared to trying to futz around with CUDA or AMD's flavor of OpenCL. Not to mention that if you are really married to OpenCL you could get it working on MIC with much less effort than trying to either write your own GPU driver or deal with the inconsistencies in Nvidia and AMD's offerings.

Lessee... please name one graphics card where you can emit code directly from GCC to work on the GPU hardware... oh wait, you can't because the GPUs are completely non-standardized and require god-awful translation layers.

Re:Best HPC news for Linux EVER

[s.petry]

Sorry, but you can't count GPU based systems as X86. You are using a RISC based chip as the workhorse in the cluster, with exceptional math co-processing of course. The X86 chips act as a bridge, which is what they can do best in my opinion.

Re:Best HPC news for Linux EVER

[Anonymous Coward]

What they don't talk about for supercomputing in this article is the interconnect. Because the X86 instruction sets are massive, it generally does not work very well. Piping that many large instructions scales poorly, hell it's hard to get 8 chips on a board let alone having an interconnect bundling 128 or so. This is the advantage that RISC has always had over architecture, and why every supercomputer up to date worth speaking of has used RISC over Intel X86.

I'm going to assume it's just a pipe dream until I see an interconnect that can operate over many CPUs on a X86 platform without choking itself to death.

Classic slashdot -- post a bunch of ignorance and pretend that it's meaningful.

Code density: reality is the opposite of what you claim. x86 is relatively dense, and RISC ISAs tend to be less dense. This is precisely because variable length instruction sets like x86 tend to pack more tightly than fixed length ISAs like a classic RISC. Instruction decode complexity was the nut the original RISC designers in the 1980s were trying to crack, and they were willing to accept reduced density to simplify it. (Note that what was a good tradeoff in the 1980s is not necessarily a good tradeoff today!)

Interconnect: here you are just plain disconnected from reality. Any supercomputer which uses even a small fraction of its interconnect bandwidth routinely moving code around is a supercomputer running code written by the malicious or incompetent. Code should be distributed to local memories in each node and cached by the local processors. Except for startup, instruction fetches should never need to traverse interconnect. This is true regardless of instruction set.

8 chips on a board: actually, Intel's standard glueless interconnect in high end Xeons already supports 8 sockets. And if you knew jack about large x86 systems you'd know there are also vendors adding their own fabric glue on top to scale up further. Try 256 sockets on for size:

http://www.sgi.com/products/servers/uv/models.html

(And this is by no means the largest thing possible.)

And hell, heavy duty computing requires Linux. I'm sure Balmer tried to work a deal though. Good job Intel!

Yet more classic slashdot: insert mindless Microsoft bashing and pro-Linux rah-rah-rah where it doesn't even make sense because Intel is bloody well using Linux on these things!.

Somebody needs to invent gutpunch-over-IP so that idiot posters like you can get their just rewards for opening their mouths.

Re:Best HPC news for Linux EVER

[Anonymous Coward]

With all due respect, this seems more similar to barebones shader programming than to the usual issues running OpenGL which is why it's "about a trillion times simpler".

Assembler ~= shader programming ~= Xeon Phi programming

This is a false equivalence. Xeon Phi programming is relatively standard SIMD assembly programming, except easier than average because they did an awesome job designing the ISA (seriously, go back and look up the Dr. Dobbs article on the ISA written back when they were still going to try to productize it as a consumer GPU, it may have failed but it didn't fail because the vector ISA was a poor design). Shader programming tends to be a lot more involved, esoteric, and complex. You'll bump into a lot more limitations, dataflow problems, control flow inflexibility, and so forth.

Future changes to give full usage of Knights Corner vector instructions would require work on the GCC vectorizer to utilize those instructionsâ(TM) masking capabilities. This is something that requires a broader discussion in the GCC community than simply changing the code generator.

Those masking capabilities should make it a lot easier to write a vectorizing compiler than traditional vector ISAs. There will be far fewer cases where an optimal compiler should suppress vectorization. When you're targeting something like SSE, which is much less regular and flexible and has a lot more control flow gotchas, it's a lot harder for the compiler to make good decisions about what should and should not be vectorized. So if anything, the modifications will be along the lines of "simplify this for this case, because all these old complexities are now irrelevant".

Besides, what exactly is your objection here, that new ideas require effort to implement? That's silly. If they're genuinely better ideas, we'll be better off once that's been done.

Re:Best HPC news for Linux EVER

[Anonymous Coward]

x86 instruction set has nothing to do with how many chips you can get on a die. I have no idea why you keep talking about interconnects and x86 like they're related. x86 sits between the L1 cache and the core and has nothing to do with anything else.

Isn't Larrabee a graphic chip ?

[Taco Cowboy]

Am I missing something?

Why in the world Intel wants to resurrect a many-cored graphic chip that performed far worse than what Nvidia or ATi are offering?

Re:Isn't Larrabee a graphic chip ?

[0123456]

AFAIR, Larrabee was a ton of cut-down x86 cores on a graphics chip. So it could be far more useful for massively parallel computing.

Re:Isn't Larrabee a graphic chip ?

[Anonymous Coward]

Larrabee never really was about graphics, that's only one use. It works like a normal cpu, runs x86 and memory access is not gpu-like retarded. There are 512-bit SIMD instructions to help parallel processing, which is good if you need to render pixels, but sandy/ivy-bridge is closing the gap on it with 256-bit AVX. When haswell comes around (AVX2) with possibly even more cores I don't really see why anyone would buy it, unless it bumps the core count to like 32/64 and adds a lot of cache.

Re:Isn't Larrabee a graphic chip ?

[gman003]

It was, sort of.

Modern GPUs are essentially thousands of very simple, low-speed cores. Think of a thousand 486s. They use driver software to make it do the graphics calculations, because that means they can be more flexible. There are no fixed-function pipelines anymore - it's all software, either in the drivers, or in the customizable shaders.

Intel's plan was to make a GPU that has a few dozen (32 or so) more complex cores, that were x86 compatible. They added some specialized extra-wide SIMD stuff and some fast-blitting texture units, but it was still x86 compatible. And they had some very impressive drivers to make it function as a "graphics card" - they even demonstrated real-time raytracing in 2009, something nVidia only demonstrated their cards doing this year (and Intel did it in an actual game, not a tech demo).

However, that flexibility made it a bit underwhelming at the things most games actually do, so it really couldn't compete in that marketplace, at least not at the prices they expected to need to be profitable. But that highly-flexible but also highly-parallel architecture seems perfectly suited to supercomputing.

Re:Isn't Larrabee a graphic chip ?

[robthebloke]

It works like a normal cpu, runs x86 and memory access is not gpu-like retarded.

define 'normal' ? Memory access was GPU-like retarded. It reminded me of the cell....

I don't really see why anyone would buy it, unless it bumps the core count to like 32/64 and adds a lot of cache.

Knights corner was originally quoted as being ~48 cores, each core could do 4 way hyperthreading, and each thread could process 16 floats instead of your usual 8 (with AVX). That was all backed up by 2Gb DDR5 memory. The hardware prototypes they've shown, certainly seem to be in that ball park, so I don't imagine the specs have got any worse over the last year or so. I'd buy one, for no other reason than it looks like it would be quite an enjoyable platform to target.

Re:Isn't Larrabee a graphic chip ?

[evorster]

Looking over the comments so far... I want one! Not because I play a lot of games, but because I do some video editing, and even though nVidia's VDPAU is good, it's not as good as having quite a few more cores chewing away at some HD footage. Where do I sign up?

Re:Isn't Larrabee a graphic chip ?

[Ruie]

define 'normal' ? Memory access was GPU-like retarded. It reminded me of the cell....

What do you mean ? The instruction set manual gives not hints of this. It even has a scatter/gather instruction.

Re:Isn't Larrabee a graphic chip ?

[makomk]

Larrabee doesn't support any of the existing x86 SIMD instruction sets, so any code's going to need to be rewritten in order to get decent performance on it anyway.

Re:Isn't Larrabee a graphic chip ?

[s.petry]

It's thousands of Math processors, like the old DX systems had. Not like the x86 chips. Yes, there is a big difference.

Re:Isn't Larrabee a graphic chip ?

[Anonymous Coward]

It works like a normal cpu, runs x86 and memory access is not gpu-like retarded.

define 'normal' ? Memory access was GPU-like retarded. It reminded me of the cell....

Uh... what??!

Cell: each stream processor core has access to its own local scratch memory, and cannot directly access any other core's memory, or even (IIRC) the main system memory (DRAM). There are DMA engines to copy data around and you must use them to explicitly manage dataflow. If the code running on the stream processors requires random walks through a large data structure, you will know real pain.

Larrabee/Knights Corner: each processor core is a full fledged x86, with its own caches. However, all caches in the chip are coherent, with standard x86 SMP semantics including memory ordering. Write anything to any address, and all other cores can see it automatically. The only oddity is that the Larrabee address space is separate from the host computer, but the intent is that you just run an OS instance on Larrabee (Intel uses Linux) and treat it as a computer which happens to be packaged as a PCIe card.

One of these things is possibly even worse than GPU insanity. The other is just the standard x86 SMP memory model.

It's exascale but...

[Anonymous Coward]

is it webscale? I'll use it if it's webscale.

I'll be setting off fireworks if ...

[Taco Cowboy]

... Intel does not charge an arm and a leg for their new "Xeon Phi"

If Intel can make the thing affordable (but I really doubt Intel will ever sell anything that is "affordable") then yes, the Linux community, particularly those who do not have any resource to any super-computer, can start running simulation programs that requires massive crunching power

Re:I'll be setting off fireworks if ...

[im_thatoneguy]

But I really doubt Intel will ever sell anything that is "affordable".

Do you live in the third world? Since when has a $150 computer considered "Unaffordable"?

Did anyone else read that as "Xeon Pi?"

[catmistake]

Had to do a double-take... I thought for a brief moment that Raspberry Pi made a deal with Intel... for a credit card sized über-idkw.

Re:Did anyone else read that as "Xeon Pi?"

[Taco Cowboy]

You are lucky

My first thought was that it must be a joke

But then, April is some two moons ago

Yes, the first time I seen it I thought I saw "Xeon pffffft" !

Windows?

[im_thatoneguy]

Can I run regular x86 Windows apps on it or do I need to write it specifically for this chip? I'm thinking rendering applications specifically.

Re:Windows?

[godrik]

I do not know about windows compatibility. But I programmed for that chip, it supports almost directly programming using openmp, intel cilk or intel TBB.

I benchmarked a prototype version of the card of unstructured memory access kernels (graph algorithms) http://bmi.osu.edu/hpc/papers/Saule12-MTAAP.pdf

CYA NVidia

[kramulous]

It was nice knowing you.

Any power consumption data available yet?

Re:CYA NVidia

[DigiShaman]

For what, a generation? That's not enough bring nVidia to it's knees you know. This leap frogging is something both nVidia and AMD/ATI experience with each product launch. *yawn*

if using X86 which is hot and slow....

[Anonymous Coward]

Building an HPC which exceeds 30-petaflops using INTEL processors will require also building a small nuclear reactor to power it. INTEL processor are wattage hogs. INTEL PROCESSOR RUN HOT!

Any processor that runs fast _and_ cool ?

[Taco Cowboy]

INTEL PROCESSOR RUN HOT!

Maybe my exposure to the real world is very limited ... ... but I have yet to encounter a processor that runs both fast and cool

Re:Any processor that runs fast _and_ cool ?

[im_thatoneguy]

but I have yet to encounter a processor that runs both fast and cool

As the benchmarks a few days indicated, Ivy Bridge is both cooler and faster per performance than ARM.

PowerPC is RISC but the Xbox360 is notorious for its heat. Performance per Watt is actually quite friendly to x86 right now.

Re:Any processor that runs fast _and_ cool ?

[Kjella]

More like you can always make it run faster by running hotter, I'd say all processors are somewhere between ridiculous and ludicrous speed these days. Even my 100 gram phone running off a battery isn't what I'd call slow, of course YMMV. And what I get on a laptop/desktop is staggering compared to how much energy I use doing trivial things like lighting, cooking, dishwasher, washing machine and so on and I don't even generally use electric for heating/cooling. And if you count just the actual computing on the CPU/GPU and ignore the display etc. it's even more extreme.

Re:Any processor that runs fast _and_ cool ?

[SuricouRaven]

I don't know about the Ivy chips, but some of the Atoms boast power usage as good as an equal-performance ARM... for the processor. They still lose overall though, because the northbridge and rest of the chipset for an atom can consume as much power as the processor or more, while the ARM processors do almost everything on one chip.

Heh

[Anonymous Coward]

No, it only runs Linux.

Re:Heh

[symbolset]

It's for high performance computing (HPC). HPC people pretty much only run Linux. No Windows.

Personally I am more interested in using it for bulk transcoding and raytracing. But that's just me.

ExaScale ??

[rossdee]

Exa means 10^18

So will this thing have 10^18 cores or something?

Or will it just cost 10^18 dollars

Even if they pnly sold one it would be enough to end the worlds economic problems
Of course it would take another sollar system to buy it.

Re:ExaScale ??

[Ruie]

It will make it possible to execute 10^18 instructions per second.

Re:ExaScale ??

[SuricouRaven]

Specifically 10^18 floating point operators per second. Floating point math doesn't get much use in games or most things a home user would do, but in HPC work - overwhelmingly scientific and engineering simulations - floating point performance is everything.

Re:ExaScale ??

[Anonymous Coward]

This thing is SSE, SSE supports both integer and FP arithmetic. So if it can do 10^18 FLOPS, it can do 10^18 IPS.

Also FP arithmetic is used very extensively in games, and multimedia. Anywhere trigonometry goes, FP follows.

Re:ExaScale ??

[Anonymous Coward]

Video games use LOTS of vector FP math. SIMD is vector instructions. I have a feeling SIMD vector instructions will do well in vector heavy games. Think polygons and physics.

Re:ExaScale ??

[godrik]

the exascale here refers to 10^18 flop/s. One chip will of course not achieve that. But a bunch of them might.

Xbox369 heat problems

[Anonymous Coward]

Xbox360 heat problems where caused by ATI's 130nm GPU, not the 90nm PowerPC CPU. im_thatoneguy sell your snake oil some where else.

you don't suppose...

[alices ice]

that this is the mystery meat going into those "later next year" promises of something wonderful for the mac pro users?

Re:you don't suppose...

[Anonymous Coward]

Actually, I wouldn't be surpised if the original requester of this technology was a three letter agency needing absurd amounts of fast processing to decrypt lots and lots of data.

Re:you don't suppose...

[Anonymous Coward]

I'm pretty sure the military has had access to very similar technology for a while. I recall reading an article several years ago that talked about 100+ core designs in an expansion slot.

Re:you don't suppose...

[Anonymous Coward]

Actually, I wouldn't be surpised if the original requester of this technology was a three letter agency needing absurd amounts of fast processing to decrypt lots and lots of data.

Uh, no. No conspiracy thinking is necessary. Intel quite openly developed it with the intent of productizing it as a consumer GPU, and the original version of it has all sorts of features which were only necessary for that function (like some fixed function units dedicated to texture mapping, which they'd determined could not be efficiently implemented in software, unlike the rest of the 3D rasterization pipeline). It was basically trying to skate to where the puck would be. GPUs were trending to be more and more programmable, so why not go all the way and make the programmable elements simple x86 CPUs living in the same unified address space as the rest of the system?

That plan didn't work out so well. They had a few delays and by the time the original GPU iteration was ready for market, it was going to be uncompetitive with ATI and nVIDIA GPUs. That and generally tepid reaction convinced them to cancel the GPU idea (for now, it'll be interesting to see if it comes back eventually). But they still had a lot of interest from the HPC market, because their architecture offers similar peak compute throughput to GPGPU with a much simpler programming model, and far fewer ways to fall off of peak throughput. (GPGPU programming tends to require a lot of optimization to get the most out of a GPU, since the machine models for GPUs are so weird and unbalanced for general purpose code.)

Re:I say we begin this minute!

[MechaStreisand]

Why can't these worthless motherfuckers get banned from Slashdot? Or at least modded down to hell?

skip the graphics - go to AI uses

[Anonymous Coward]

I looked at Larabee (wasnt that a Get Smart agent name??) long ago looking at its use for AI. But it never got out into the world.

The GPUs were too restricted by their warp/ weave parallelism and limited if-then and limited localized data made them inefficient for extreme random and irregular logic that alot of behavioral AI uses (we have plenty of graphics in games these days, its the AI thats on lamestreet.

How does "exascale" compare to "webscale"?

[AtlantaSteve]

Should MongoDB people be worried?

There's the problem

[Anonymous Coward]

"the Many Integrated Core CPUs...offer unparalleled performance scaling and break new ground"

I thought these things were supposed to offer paralleled performance

Dang, haven't seen that many zeros

[bryan1945]

Since my high school dance card.
Sigh.

Windows is the best

[Anonymous Coward]

But the Microsoft guy that bought my staff lunch told us that Windows was the leader in High Performance Computing. And that Hyper-V will innovate a new paradigm shift in the world of clusters, data centers and HPC.

Re:Windows is the best

[symbolset]

You need to hold out. My guy sports a premium blunt out by the dumpster while he talks the blah blah.

Re:Windows is the best

[symbolset]

Of all the times to forget the /s I had to pick this one.